RE: [avr-gcc-list] Inversion of logic improves size speed

[Eric Weddington]

> -----Original Message-----
> From:
> address@hidden
> [mailto:address@hidden
> org] On Behalf Of Anatoly Sokolov
> Sent: Monday, August 27, 2007 7:14 AM
> To: Wouter van Gulik
> Cc: address@hidden
> Subject: Re: [avr-gcc-list] Inversion of logic improves size speed
>
>
> > Anatoly Sokolov wrote:
> >> Hi.
> >>
> >> This patch optimizes logic left shift of unsigned char by
> 4, 5, and 6,
> >> excluding double 'andi' instructions in some cases.
> >>
>
> Patch.
>
> Anatoly.


Hi Anatoly,

I build gcc 4.2.1 with this patch.

Interestingly, for bug #33028 there is no difference between 4.1.2, and
4.2.1 with this patch. I see the bug show up in 4.3.0 snapshot, but I have
not tried the patch with 4.3.x yet.

For bug #11259, the testcase in question generates this:

        in r24,50-0x20
        swap r24
        andi r24,0x0f
        andi r24,lo8(12)

With this patch it transformed it to:

        in r24,50-0x20
        swap r24
        andi r24,lo8(12)

Which looks to be correct.

Thanks,
Eric Weddington