Re: [avr-gcc-list] Inversion of logic improves size speed

[Wouter van Gulik]

Anatoly Sokolov wrote:
> Hi.
>
> This patch optimizes logic left shift of unsigned char by 4, 5, and 6, 
> excluding double 'andi' instructions in some cases.

<snip>

> Now:
>
> 00000092 <getBit4InvShift>:
>   92: 82 95        swap r24
>   94: 81 70        andi r24, 0x01 ; 1
>   96: 08 95        ret
>
> 00000098 <getBit5InvShift>:
>   98: 82 95        swap r24
>   9a: 86 95        lsr r24
>   9c: 81 70        andi r24, 0x01 ; 1
>   9e: 08 95        ret
>
> 000000a0 <getBit6InvShift>:
>   a0: 82 95        swap r24
>   a2: 86 95        lsr r24
>   a4: 86 95        lsr r24
>   a6: 81 70        andi r24, 0x01 ; 1
>   a8: 08 95        ret

That's good news! No more "clr r25" and no "double and" anymore!
Does this fix the "double and" in more situations? Is this because the 
"swap"&"and" is now exposed to the upperlayers?

One thing, the patch is not in this e-mail (the list). And I did not 
receive your e-mail on my private e-mail. Maybe it's filtered. Will 
check my junk map.

Thanks,

Wouter