[Bug gas/22598] [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions

[asb at lowrisc dot org]

https://sourceware.org/bugzilla/show_bug.cgi?id=22598

--- Comment #7 from Alex Bradbury <asb at lowrisc dot org> ---
I would have personally expected jal to take a multiple of two bytes in the
range [-1048576, 1048574], branches to take multiple of two bytes in [-4096,
4094] and so on.

That would seem consistent with the assembler behaviour I'm seeing in Mips, ARM
and AArch64 in the LLVM assembler unit tests. Is there a reason to be really
different here? I think having the most obvious assembler syntax mirror the
semantics of the instruction definition (PC+offset) makes a lot of sense.

-- 
You are receiving this mail because:
You are on the CC list for the bug.