Re: [Discuss-gnuradio] USRP Dynamic Range and 8 Bit Problem

[Don Ward]

> > > I don't have the tools to do so.
>
> No tools are required. All what you have to do is to download the free 
> windows Altera  FPGA  design  software  (Quartus II Web edition) . . .

Yeah, that's the part I haven't done yet . . .

> Alternatively (In this case I think it is quicker), tell me the places in 
> verilog code to be changed, and I will modify it and  recompile the rbf 
> file  and  test it.

The safest (I think) is to change the assignments at the end of cordic.v 
from

   assign xo = x12[bitwidth:1];
   assign yo = y12[bitwidth:1];

to
   assign xo = x12[bitwidth-1:0];
   assign yo = y12[bitwidth-1:0];

You might (or might not) get slightly better results by changing the scaling 
in adc_interface.v instead, from

   adc0[11],adc0,3'b0

to

   adc0,4'b0

(and similar for adc1, adc2, and adc3), but it would need to be verified 
that this won't overflow the cordic stage.  Change cordic.v or 
adc_interface.v, but not both.

The final tweak would be to change the scaling table in cic_dec_shifter.v 
from

   ceil(N*log2(rate))

to

   ceil( N*log2(rate) + log2(1.6467/2) )

to use some of the range lost in the CORDIC stage with some decimations.

Regards,

-- Don W.