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From: | Josh Blum |
Subject: | Re: [Discuss-gnuradio] About clock rate of USRP E100 |
Date: | Thu, 20 Jan 2011 12:39:19 -0800 |
User-agent: | Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.13) Gecko/20101208 Lightning/1.0b2 Thunderbird/3.1.7 |
> Thanks a lot for your help. Could you explain how to slow down the FPGA/ADC > rate? How should we modify the firmware? Which part of the code should we > look into? Thanks! > > This is a host code modification. see the clock_ctrl.cpp in host/lib/usrp/usrp_e100/ http://code.ettus.com/redmine/ettus/projects/uhd/repository/revisions/master/entry/host/lib/usrp/usrp_e100/clock_ctrl.cpp You will want to manipulate codec clock. -Josh
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