Re: [Discuss-gnuradio] Doubt about FPGA code and firmware

[Matthias Wilhelm]

Am 14.02.2011 um 15:09 schrieb Eduardo Lloret Fuentes:

> Hello,
> 
> @Nick Foster
> If your FPGA design doesn't include a Microblaze processor to do
> something useful with the firmware image, you won't need to load the
> firmware.
> 
> My FPGA design doesn't include a Microblaze processor so I also think that I 
> don't need it. My doubt comes from the boot sequence that I read in the 
> USRP2GenFAQ section: 
> http://gnuradio.org/redmine/wiki/gnuradio/USRP2GenFAQ#How-does-the-USRP2-boot-How-is-the-FPGA-firmware-loaded
>  
> If I don't have a processor, the second step is not necessary but I don't 
> know if the first (loading of FPGA design) is accomplished properly. What do 
> you think?
> 
> @Gabriel Morel
> Will you start from a new project or just modify the old one.  I try to 
> compile the raw ethernet version but I have many problem.  Give some news of 
> your works plz.
> 
> I started completely from a new project but If I try to modify the old one I 
> will tell you my results.
> 
> @Matthias Wilhelm
> if you plan to use any part of the USRP2's hardware (daughterboard, ADC, 
> UART, ethernet, ...) and don't want to implement all the steps required to 
> configure and use them properly, I would suggest to integrate your code 
> parallel to the vanilla system (the UHD one!), it is far more work to get it 
> running otherwise. The firmware does a lot of stuff. If you don't plan to use 
> the hardware why not use a Spartan evaluation kit instead, they have nicer 
> I/O capabilities for experimenting and testing?
> 
> I plan to use the BasicRX, BasicTX, LFTX and LFRX daughterboards just as a 
> simple input/output to the FPGA. Besides I need the ADC and DAC but I thought 
> they don't need the processor. A lot of thanks for your advice. When you say 
> to integrate the code to the vanilla system, do you mean add my verilog code 
> to their project? 
> 
> I also think it would be better to use a Spartan evaluation kit to do this 
> but the use of the USRP2 board is part of my thesis requirements.
> 
> Thanks you so much to all of you for your help.
> 
> Greetings.
> 
> Eduardo.

Hello Eduardo, 

we have implemented a system on the FPGA+firmware, and in my opinion it is the 
best way to reuse as much as possible when working with the USRP2's FPGA. The 
firmware is useful because it enables communication with the host via ethernet 
for configuration. When you start to send or receive samples, the host driver 
sets up the FPGA and hardware with proper parameters (via ethernet and the 
firmware), it writes quite a lot of registers and transactions to get it 
running (setting up the on-board chips, identifying the daughterboard and 
setting it up, ...). 

So all in all, you need to know what you want and how to configure it from the 
FPGA, and you might have to dig through the UHD code to understand what you 
need to set up. It seems that the boards you want to use do not require much 
config, but the firmware configures (at least) the clock and the DAC (ad9510 
and ad9777), which are quite necessary. So you could go without firmware and 
set it up yourself, but it will be hard to find the problem in case it doesn't 
work directly.

For our project, we added modules into u2_core.v, inside the main module of the 
USRP2. You can tap the RX DSP pipeline there to get samples (or the ADC 
directly if you want), and place samples you want to send into the buffer pool 
and reuse  the existing system, or write to the DAC wires directly (after 
cutting the connections from the TX pipeline). When you use both the DAC/ADC 
directly, you can also put your module(s) into u2_rev3.v, implementing your 
system in parallel to u2_core.

So even when you do not need the functionality of the firmware, it is still 
good to have it around. If you later have plans to configure your system via 
ethernet, collect information from your module and send it to a host PC or send 
debug information via UART, its a lot easier with the firmware because you have 
almost everything you need in place.

The link to the UHD code (FPGA, host, firmware):
http://ettus-apps.sourcerepo.com/redmine/ettus/projects/uhd/wiki

If you want to reuse the code, you should modify the ISE project provided with 
the UHD code (do a "make proj" in top/u2_rev3 and look into the "build" dir), 
as not all verilog files are used for every design, so creating a project by 
hand/mixing the files will most likely lead to problems even in case it 
compiles. You need ISE 12.X.

Matthias

ps. I think this discussion should move usrp-users.