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Re: [Discuss-gnuradio] UHD fpga code compile error
From: |
Josh Blum |
Subject: |
Re: [Discuss-gnuradio] UHD fpga code compile error |
Date: |
Thu, 07 Apr 2011 11:05:11 -0500 |
User-agent: |
Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 |
On 04/07/2011 03:28 AM, James Jordan wrote:
> Hi all,
> I compile uhd fpga code meet a lot of errors.
> I use quartus II 9.1 web edition.
> I directly open the fpga project
> file(EttusResearch-UHD-Mirror-81e891f\fpga\usrp1\toplevel\usrp_std\usrp_std.qpf)
> then choose menu Processing->start compilation then meet a lot of errors.
> I think the errors major cause by some file can not be found like that:
> Error (10054): Verilog HDL File I/O error at adc_interface.v(3): can't open
> Verilog Design File "../../firmware/include/fpga_regs_common.v"
>
>
>
That quartus code hasn't needed to be recompiled in the last 20 years. I
suspect that the relative paths were not updated when the code moved.
Can you try this diff?
diff --git a/fpga/usrp1/toplevel/usrp_std/usrp_std.v
b/fpga/usrp1/toplevel/usrp_std/usrp_std.v
index 8b29a9c..83a89cb 100644
--- a/fpga/usrp1/toplevel/usrp_std/usrp_std.v
+++ b/fpga/usrp1/toplevel/usrp_std/usrp_std.v
@@ -28,8 +28,8 @@
// Uncomment the following to include optional circuitry
`include "config.vh"
-`include "../../../firmware/include/fpga_regs_common.v"
-`include "../../../firmware/include/fpga_regs_standard.v"
+`include "../../../../firmware/fx2/common/fpga_regs_common.v"
+`include "../../../../firmware/fx2/common/fpga_regs_standard.v"
module usrp_std
(output MYSTERY_SIGNAL,
-Josh
>
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