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[Help-gnucap] verilog-ams instance loading
From: |
John Griessen |
Subject: |
[Help-gnucap] verilog-ams instance loading |
Date: |
Mon, 26 Jan 2009 13:25:27 -0600 |
User-agent: |
Mozilla-Thunderbird 2.0.0.17 (X11/20081018) |
I want to drive this netlisted circuit with a vsource:
// structural Verilog generated by gnetlist
// WARNING: This is a generated file, edits
// made here will be lost next time
// you run gnetlist!
// Id ..........$Id$
// Source.......$Source$
// Revision.....$Revision$
// Author.......$Author$
module verilog_io ( GND , OUT , IN );
capacitor #(.c(1250e-9) ) C1 ( .p(B), .n(GND));
inductor #(.l(.001) ) L1 ( .n(OUT), .p(B));
resistor #(.r(1000) ) R1 ( .n(B), .p(IN));
endmodule
verilog_io1 verilog_io ( .GND(0) , OUT(VOUT), .IN(VIN));
============================
But, I can't get the instance defined...
gnucap-verilog>get ./verilog_io.net
// structural Verilog generated by gnetlist
verilog_io1 verilog_io ( .GND(0) , OUT(VOUT), .IN(VIN));
^ ? v: no match
gnucap-verilog>include ./verilog_io.net
verilog_io1 verilog_io ( .GND(0) , OUT(VOUT), .IN(VIN));
^ ? verilog_io1: no match
John Griessen
--
Ecosensory Austin TX
- [Help-gnucap] verilog-ams instance loading,
John Griessen <=