[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-arm] [PATCH v2 10/11] target/arm: Migrate v7m.other_sp
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH v2 10/11] target/arm: Migrate v7m.other_sp |
Date: |
Fri, 9 Feb 2018 16:58:09 +0000 |
In commit abc24d86cc0364f we accidentally broke migration of
the stack pointer value for the mode (process, handler) the CPU
is not currently running as. (The commit correctly removed the
no-longer-used v7m.current_sp flag from the VMState but also
deleted the still very much in use v7m.other_sp SP value field.)
Add a subsection to migrate it again. (We don't need to care
about trying to retain compatibility with pre-abc24d86cc0364f
versions of QEMU, because that commit bumped the version_id
and we've since bumped it again a couple of times.)
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/machine.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 25cdf4d581..1a20d6c36c 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -236,6 +236,16 @@ static const VMStateDescription vmstate_m_scr = {
}
};
+static const VMStateDescription vmstate_m_other_sp = {
+ .name = "cpu/m/other-sp",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(env.v7m.other_sp, ARMCPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static const VMStateDescription vmstate_m = {
.name = "cpu/m",
.version_id = 4,
@@ -259,6 +269,7 @@ static const VMStateDescription vmstate_m = {
&vmstate_m_faultmask_primask,
&vmstate_m_csselr,
&vmstate_m_scr,
+ &vmstate_m_other_sp,
NULL
}
};
--
2.16.1
- [Qemu-arm] [PATCH v2 00/11] v8m: minor missing regs and bugfixes, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 03/11] hw/intc/armv7m_nvic: Implement M profile cache maintenance ops, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 04/11] hw/intc/armv7m_nvic: Implement v8M CPPWR register, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 02/11] hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handling, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 05/11] hw/intc/armv7m_nvic: Implement cache ID registers, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 10/11] target/arm: Migrate v7m.other_sp,
Peter Maydell <=
- [Qemu-arm] [PATCH v2 07/11] target/arm: Implement writing to CONTROL_NS for v8M, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 11/11] target/arm: Implement v8M MSPLIM and PSPLIM registers, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 09/11] target/arm: Add AIRCR to vmstate struct, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 08/11] hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions, Peter Maydell, 2018/02/09
- [Qemu-arm] [PATCH v2 01/11] hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC, Peter Maydell, 2018/02/09