Re: [Qemu-devel] [Patch] Ali Chipset support for PC [+ questions about alpha-softmmu target]

[Brian Wheeler]

On Wed, 2008-09-10 at 16:17 +0200, Tristan Gingold wrote:
> >>> * What state is the alpha cpu emulation in, and what's the best  
> >>> way to
> >>> test it?
> >>
> >> Still beta.  It was not maintained nor tested for a while.  And bugs
> >> were recently found.
> >>
> >
> > Anything that I can do to help?  I worked on es40 (mostly pc-style
> > hardware stuff) so if I can help I'd like to.
> 
> A simple printf("Hello world\n") program compiled on linux now works  
> on qemu (patches
> pending).  So the cpu emulation is not that bad.  There are still a  
> lot to check (FPU,
> overflow) but they are less frequently used.
> 
> >
> >>> * Looking over some of the softmmu targets, it looks like the  
> >>> bulk of
> >>> target work (after the cpu emulation, of course) is just  
> >>> attaching all
> >>> of the devices in the right places.
> >>
> >> Booting might be an issue too as alpha boots from icache.
> >> It looks like es40 has an IO-TLB which is not present in standard
> >> PC.  I suppose Sparc64 has also
> >> an IO-TLB but I didn't look further.
> >
> > Yeah, the icache thing will be interesting.  Looking at es40, the  
> > icache
> > looks like its only used during the rom decompression stage.  es40
> > creates a decompressed rom file on the first run and it looks like the
> > first uint64 is the PC, and the second uint64 is the PAL_BASE.  That
> > should be enough to get the system up and running (after a software- 
> > only
> > call_pal instruction is implemented)...and it doesn't seem to mess  
> > with
> > the icache in that case.
> >
> > I may look at a standalone rom extractor, so you can give it the
> > cl67srmrom.exe file and drop out a ready-to-run rom file.
> 
> So if you get the SRM decompressed from es40, you can start to work  
> on the softmmu
> emulation.
> 

I'll start looking at the 21072 (Typhoon) chipset. 

Where does the physical address -> {IO Port, PCI Memory, RAM} routing
take place in QEmu.  I'm seeing lots of registration functions, but I
can't seem to find where the call takes place based upon a physical
address...


Brian


> Tristan.
> 
> 
>