Re: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset

[Avi Kivity]

> >
> > There is no way to guarantee this.  If A is driven high before the
> > target device detects RESET, it will see the edge.
>
> That case is not what we have here, it would be equivalent of pulsing
> qemu_irq reset lines for each device in order. This would be even
> worse than what we have now.


That's  not what I'm saying.


>
> > Of course real hardware has timing specs, but these are maximum
> > latencies.  If the XNOR gate is especially fast today it can
> > overtake the target device's reset edge detector.
>
> Devices don't have reset edge detectors.
>

Say the target device's output has an AND connecting #RESET and an input, to 
the output.  When #RESET is asserted, the input is driven low.  The output is 
connected to a counter.

When #RESET is asserted, the source device's A and B are raised high, with 
delay Da and Db.  If they are different, the XNOR gate generates a pulse with 
delay Dx.  If Dx is smaller than the AND gate's delay Drm, then the counter 
will count.