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[Qemu-devel] [PATCH 07/21] target-sparc: Extract float128 move to a func
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 07/21] target-sparc: Extract float128 move to a function. |
Date: |
Tue, 18 Oct 2011 11:50:29 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-sparc/translate.c | 50 ++++++++++++++++-----------------------------
1 files changed, 18 insertions(+), 32 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index c47a035..f37dbb1 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -227,6 +227,20 @@ static void gen_op_store_QT0_fpr(unsigned int dst)
offsetof(CPU_QuadU, l.lowest));
}
+#ifdef TARGET_SPARC64
+static void gen_move_Q(int rd, int rs)
+{
+ rd = QFPREG(rd);
+ rs = QFPREG(rs);
+
+ tcg_gen_mov_i32(cpu__fpr[rd], cpu__fpr[rs]);
+ tcg_gen_mov_i32(cpu__fpr[rd + 1], cpu__fpr[rs + 1]);
+ tcg_gen_mov_i32(cpu__fpr[rd + 2], cpu__fpr[rs + 2]);
+ tcg_gen_mov_i32(cpu__fpr[rd + 3], cpu__fpr[rs + 3]);
+ gen_update_fprs_dirty(rd);
+}
+#endif
+
/* moves */
#ifdef CONFIG_USER_ONLY
#define supervisor(dc) 0
@@ -2836,15 +2850,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
break;
case 0x3: /* V9 fmovq */
CHECK_FPU_FEATURE(dc, FLOAT128);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)],
- cpu__fpr[QFPREG(rs2)]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1],
- cpu__fpr[QFPREG(rs2) + 1]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2],
- cpu__fpr[QFPREG(rs2) + 2]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3],
- cpu__fpr[QFPREG(rs2) + 3]);
- gen_update_fprs_dirty(QFPREG(rd));
+ gen_move_Q(rd, rs2);
break;
case 0x6: /* V9 fnegd */
gen_ne_fop_DD(dc, rd, rs2, gen_helper_fnegd);
@@ -2929,11 +2935,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
cpu_src1 = get_src1(insn, cpu_src1);
tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
0, l1);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)],
cpu__fpr[QFPREG(rs2)]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1],
cpu__fpr[QFPREG(rs2) + 1]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2],
cpu__fpr[QFPREG(rs2) + 2]);
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3],
cpu__fpr[QFPREG(rs2) + 3]);
- gen_update_fprs_dirty(QFPREG(rd));
+ gen_move_Q(rd, rs2);
gen_set_label(l1);
break;
}
@@ -2983,15 +2985,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
gen_fcond(r_cond, fcc, cond); \
tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
0, l1); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], \
- cpu__fpr[QFPREG(rs2)]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], \
- cpu__fpr[QFPREG(rs2) + 1]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], \
- cpu__fpr[QFPREG(rs2) + 2]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], \
- cpu__fpr[QFPREG(rs2) + 3]); \
- gen_update_fprs_dirty(QFPREG(rd)); \
+ gen_move_Q(rd, rs2); \
gen_set_label(l1); \
tcg_temp_free(r_cond); \
}
@@ -3082,15 +3076,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
gen_cond(r_cond, icc, cond, dc); \
tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
0, l1); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], \
- cpu__fpr[QFPREG(rs2)]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], \
- cpu__fpr[QFPREG(rs2) + 1]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], \
- cpu__fpr[QFPREG(rs2) + 2]); \
- tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], \
- cpu__fpr[QFPREG(rs2) + 3]); \
- gen_update_fprs_dirty(QFPREG(rd)); \
+ gen_move_Q(rd, rs2); \
gen_set_label(l1); \
tcg_temp_free(r_cond); \
}
--
1.7.6.4
- [Qemu-devel] [PATCH 15/21] target-sparc: Implement EDGE* instructions., (continued)
- [Qemu-devel] [PATCH 15/21] target-sparc: Implement EDGE* instructions., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 09/21] target-sparc: Change fpr representation to doubles., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 14/21] target-sparc: Implement fpack{16, 32, fix}., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 10/21] tcg: Optimize some forms of deposit., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 08/21] target-sparc: Undo cpu_fpr rename., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 20/21] sparc-linux-user: Add some missing syscall numbers, Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 07/21] target-sparc: Extract float128 move to a function.,
Richard Henderson <=
- [Qemu-devel] [PATCH 21/21] sparc-linux-user: Enable NPTL, Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 03/21] target-sparc: Add accessors for double-precision fpr access., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 18/21] target-sparc: Tidy fpack32., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 16/21] target-sparc: Implement ALIGNADDR* inline., Richard Henderson, 2011/10/18
- [Qemu-devel] [PATCH 19/21] target-sparc: Implement FALIGNDATA inline., Richard Henderson, 2011/10/18
- Re: [Qemu-devel] [PATCH 00/21] Sparc FPU/VIS improvements, Blue Swirl, 2011/10/18
- [Qemu-devel] [PATCH 17/21] target-sparc: Implement BMASK/BSHUFFLE., Richard Henderson, 2011/10/18