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Re: [Qemu-devel] [PATCH 3/9] target-xtensa: specialize softfloat NaN rul
From: |
Max Filippov |
Subject: |
Re: [Qemu-devel] [PATCH 3/9] target-xtensa: specialize softfloat NaN rules |
Date: |
Sun, 9 Sep 2012 19:14:58 +0400 |
On Sun, Sep 9, 2012 at 4:13 PM, Max Filippov <address@hidden> wrote:
> On Sun, Sep 9, 2012 at 1:31 PM, Peter Maydell <address@hidden> wrote:
>> the Xtensa ISA it says it doesn't have signaling NaNs. Maybe
>> it would be better to have a define for NO_SIGNALING_NANS
>> which made float*_is_signaling_nan() always return false and
>> float*_is_quiet_nan() always return true?
float*_is_quiet_nan should return float*_is_any_nan, but there's no
float16_is_any_nan. I guess it should look like this (any sign, all-ones
exponent part and non-zero mantissa part):
INLINE int float16_is_any_nan(float16 a)
{
return ((float16_val(a) & ~0x8000) > 0x7c00);
}
Is it correct?
--
Thanks.
-- Max
[Qemu-devel] [PATCH 4/9] target-xtensa: add FP registers, Max Filippov, 2012/09/08
[Qemu-devel] [PATCH 5/9] target-xtensa: implement LSCX and LSCI groups, Max Filippov, 2012/09/08
[Qemu-devel] [PATCH 6/9] target-xtensa: implement FP0 arithmetic, Max Filippov, 2012/09/08
[Qemu-devel] [PATCH 7/9] target-xtensa: implement FP0 conversions, Max Filippov, 2012/09/08