Re: [Qemu-devel] [PATCH 14/21] target-arm: A64: Implement minimal set of EL0-visible sysregs

[Richard Henderson]

On 12/17/2013 07:12 AM, Peter Maydell wrote:
> Implement an initial minimal set of EL0-visible system registers:
>  * NZCV
>  * FPCR
>  * FPSR
>  * CTR_EL0
>  * DCZID_EL0
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target-arm/cpu.h           |  3 ++-
>  target-arm/helper.c        | 58 
> ++++++++++++++++++++++++++++++++++++++++++++++
>  target-arm/translate-a64.c | 54 +++++++++++++++++++++++++++++++++++++++++-
>  3 files changed, 113 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~