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Re: [Qemu-devel] [PATCH v2 20/35] target-arm: Implement AArch64 CurrentE
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH v2 20/35] target-arm: Implement AArch64 CurrentEL sysreg |
Date: |
Sun, 9 Feb 2014 12:17:26 +1000 |
On Sat, Feb 1, 2014 at 1:45 AM, Peter Maydell <address@hidden> wrote:
> Implement the CurrentEL sysreg.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
> ---
> target-arm/cpu.h | 3 ++-
> target-arm/helper.c | 3 +++
> target-arm/translate-a64.c | 7 +++++++
> 3 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index f5b706e..e0e3736 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -732,7 +732,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
> #define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8))
> #define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8))
> #define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8))
> -#define ARM_LAST_SPECIAL ARM_CP_NZCV
> +#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8))
> +#define ARM_LAST_SPECIAL ARM_CP_CURRENTEL
> /* Used only as a terminator for ARMCPRegInfo lists */
> #define ARM_CP_SENTINEL 0xffff
> /* Mask of only the flag bits in a type field */
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index f46dd0f..0538f78 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1533,6 +1533,9 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
> .opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0,
> .access = PL0_R, .type = ARM_CP_CONST,
> .resetvalue = 0x10 },
> + { .name = "CURRENTEL", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .opc2 = 2, .crn = 4, .crm = 2,
> + .access = PL1_R, .type = ARM_CP_CURRENTEL },
> REGINFO_SENTINEL
> };
>
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index f437359..fa8d7ac 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -1233,6 +1233,13 @@ static void handle_sys(DisasContext *s, uint32_t insn,
> bool isread,
> gen_set_nzcv(tcg_rt);
> }
> return;
> + case ARM_CP_CURRENTEL:
> + /* Reads as current EL value from pstate, which is
> + * guaranteed to be constant by the tb flags.
> + */
> + tcg_rt = cpu_reg(s, rt);
> + tcg_gen_movi_i64(tcg_rt, s->current_pl << 2);
> + return;
> default:
> break;
> }
> --
> 1.8.5
>
>
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