[Qemu-devel] About AddressSpace in intel-iommu emulation

[Le Tan]

Hi Paolo,
I am adding intel-iommu emulation to q35 for the GSoC project. I am
confused about AddressSpace and I believe that you can help me. :)
1. For intel-iommu emulation, I have to read the translation
structures from guest memory, that is, the guest will prepare some
tables in memory and write the physical address of them to a register
of intel-iommu, and I need to access those structures. I use
dma_memory_read(&address_space_memory,...) to do this. Is that right?
I am not sure that whether accesses to address_space_memory will be
translated through IOMMU. I think the answer is not, because I see
that cpu_physical_memory_read() also use address_space_memory as
AddressSpace.

2. In my opinion, I have to init a AddressSpace and link it with my
IOMMU MemoryRegion, then the bus uses this AddressSpace to translate
the accesses. Is that right? For q35, how can I register my IOMMU
MemoryRegion to the bus? I see that there is function
pci_setup_iommu() that links a AddressSpace to the bus to translate
accesses to PCI into system memory. Is that related? I think q35
should maintain a bus AddressSpace, but I can't find it.
What do you think?

Thanks very much!

Regards,
Le Tan