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[Qemu-devel] [PULL 03/18] target-alpha: Store IOV exception in fp_status


From: Richard Henderson
Subject: [Qemu-devel] [PULL 03/18] target-alpha: Store IOV exception in fp_status
Date: Wed, 9 Jul 2014 09:20:19 -0700

We were not representing the IOV (integer overflow) exception at all.
For ease of implementation, allocate a generic bit in softfloat, even
though softfloat will never raise the exception itself.

This can be licensed under either the softfloat-2a or -2b license.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
 include/fpu/softfloat.h   | 13 +++++++------
 target-alpha/fpu_helper.c |  3 +++
 target-alpha/helper.c     |  6 ++++++
 3 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 77177c5..946fd3e 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -159,12 +159,13 @@ enum {
 | Software IEC/IEEE floating-point exception flags.
 *----------------------------------------------------------------------------*/
 enum {
-    float_flag_invalid   =  1,
-    float_flag_divbyzero =  4,
-    float_flag_overflow  =  8,
-    float_flag_underflow = 16,
-    float_flag_inexact   = 32,
-    float_flag_input_denormal = 64,
+    float_flag_invalid         = 1,
+    float_flag_int_overflow    = 2,
+    float_flag_divbyzero       = 4,
+    float_flag_overflow        = 8,
+    float_flag_underflow       = 16,
+    float_flag_inexact         = 32,
+    float_flag_input_denormal  = 64,
     float_flag_output_denormal = 128
 };
 
diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c
index d2d776c..aa83766 100644
--- a/target-alpha/fpu_helper.c
+++ b/target-alpha/fpu_helper.c
@@ -53,6 +53,9 @@ static inline void inline_fp_exc_raise(CPUAlphaState *env, 
uintptr_t retaddr,
         if (exc & float_flag_invalid) {
             hw_exc |= EXC_M_INV;
         }
+        if (exc & float_flag_int_overflow) {
+            hw_exc |= EXC_M_IOV;
+        }
         if (exc & float_flag_divbyzero) {
             hw_exc |= EXC_M_DZE;
         }
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 8d1df2d..6bcde21 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -36,6 +36,9 @@ uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env)
         if (t & float_flag_invalid) {
             r |= FPCR_INV;
         }
+        if (t & float_flag_int_overflow) {
+            r |= FPCR_IOV;
+        }
         if (t & float_flag_divbyzero) {
             r |= FPCR_DZE;
         }
@@ -103,6 +106,9 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val)
     if (val & FPCR_INV) {
         t |= float_flag_invalid;
     }
+    if (val & FPCR_IOV) {
+        t |= float_flag_int_overflow;
+    }
     if (val & FPCR_DZE) {
         t |= float_flag_divbyzero;
     }
-- 
1.9.3




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