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[Qemu-devel] [PULL 03/10] target-mips: Fix RDHWR on CP0.Count
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 03/10] target-mips: Fix RDHWR on CP0.Count |
Date: |
Fri, 18 Sep 2015 12:25:28 +0100 |
From: Alex Smith <address@hidden>
For RDHWR on the CP0.Count register, env->CP0_Count was being returned.
This value is a delta against the QEMU_CLOCK_VIRTUAL clock, not the
correct current value of CP0.Count. Use cpu_mips_get_count() instead.
Signed-off-by: Alex Smith <address@hidden>
Cc: Aurelien Jarno <address@hidden>
Cc: Leon Alrae <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/op_helper.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 1aa9e3c..94de108 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2184,10 +2184,15 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env)
target_ulong helper_rdhwr_cc(CPUMIPSState *env)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
- (env->CP0_HWREna & (1 << 2)))
+ (env->CP0_HWREna & (1 << 2))) {
+#ifdef CONFIG_USER_ONLY
return env->CP0_Count;
- else
+#else
+ return (int32_t)cpu_mips_get_count(env);
+#endif
+ } else {
helper_raise_exception(env, EXCP_RI);
+ }
return 0;
}
--
2.1.0
- [Qemu-devel] [PULL 00/10] target-mips queue, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 03/10] target-mips: Fix RDHWR on CP0.Count,
Leon Alrae <=
- [Qemu-devel] [PULL 05/10] target-mips: get rid of MIPS_DEBUG_SIGN_EXTENSIONS, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 07/10] target-mips: fix corner case in TLBWR causing QEMU to hang, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 08/10] target-mips: add missing restriction in DAUI instruction, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 09/10] target-mips: correct MTC0 instruction on MIPS64, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 10/10] target-mips: improve exception handling, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 02/10] target-mips: remove wrong checks for recip.fmt and rsqrt.fmt, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 06/10] pic32: use LCG algorithm for generated random index of TLBWR instruction, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 01/10] target-mips: Use tcg_gen_extrh_i64_i32, Leon Alrae, 2015/09/18
- [Qemu-devel] [PULL 04/10] target-mips: get rid of MIPS_DEBUG, Leon Alrae, 2015/09/18
- Re: [Qemu-devel] [PULL 00/10] target-mips queue, Peter Maydell, 2015/09/18