[Qemu-devel] [PATCH v2 24/26] armv7m: split armv7m_init in two parts

[Michael Davidsaver]

Separate init and realize phases to allow
board code the opportunity to set properties
on the cpu and nvic.

Assign names for cpu, nvic, and bitband regions.

update stellaris and stm32 board code accordingly.
---
 hw/arm/armv7m.c        | 42 +++++++++++++++++++++++++++---------------
 hw/arm/stellaris.c     | 18 +++++-------------
 hw/arm/stm32f205_soc.c |  6 ++++--
 include/hw/arm/arm.h   |  4 ++--
 4 files changed, 38 insertions(+), 32 deletions(-)

diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 68146de..fb805fe 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -144,11 +144,15 @@ static void armv7m_bitband_init(void)
 
     dev = qdev_create(NULL, TYPE_BITBAND);
     qdev_prop_set_uint32(dev, "base", 0x20000000);
+    object_property_add_child(qdev_get_machine(), "bitband22",
+                              &dev->parent_obj, &error_fatal);
     qdev_init_nofail(dev);
     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x22000000);
 
     dev = qdev_create(NULL, TYPE_BITBAND);
     qdev_prop_set_uint32(dev, "base", 0x40000000);
+    object_property_add_child(qdev_get_machine(), "bitband42",
+                              &dev->parent_obj, &error_fatal);
     qdev_init_nofail(dev);
     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x42000000);
 }
@@ -162,39 +166,48 @@ static void armv7m_reset(void *opaque)
     cpu_reset(CPU(cpu));
 }
 
-/* Init CPU and memory for a v7-M based board.
-   mem_size is in bytes.
-   Returns the NVIC array.  */
-
-DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int 
num_irq,
-                      const char *kernel_filename, const char *cpu_model)
+void armv7m_init(const char *cpu_model)
 {
     ARMCPU *cpu;
     CPUARMState *env;
     DeviceState *nvic;
-    int image_size;
-    uint64_t entry;
-    uint64_t lowaddr;
-    int big_endian;
 
     if (cpu_model == NULL) {
-       cpu_model = "cortex-m3";
+        cpu_model = "cortex-m3";
     }
-    cpu = cpu_arm_init(cpu_model);
+    cpu = ARM_CPU(cpu_generic_init_unrealized(TYPE_ARM_CPU, cpu_model));
     if (cpu == NULL) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
     env = &cpu->env;
 
+    object_property_add_child(qdev_get_machine(), "cpu[*]", OBJECT(cpu),
+                              &error_fatal);
+
     armv7m_bitband_init();
 
     nvic = qdev_create(NULL, "armv7m_nvic");
-    qdev_prop_set_uint32(nvic, "num-irq", num_irq);
+    object_property_add_child(qdev_get_machine(), "nvic", &nvic->parent_obj,
+                              &error_fatal);
     env->nvic = nvic;
-    qdev_init_nofail(nvic);
+
     sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0,
                        qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));
+}
+
+
+void armv7m_realize(int mem_size, const char *kernel_filename)
+{
+    ARMCPU *cpu = ARM_CPU(first_cpu);
+    DeviceState *nvic = DEVICE(object_resolve_path("/machine/nvic", NULL));
+    int image_size;
+    uint64_t entry;
+    uint64_t lowaddr;
+    int big_endian;
+
+    qdev_init_nofail(DEVICE(cpu));
+    qdev_init_nofail(nvic);
 
 #ifdef TARGET_WORDS_BIGENDIAN
     big_endian = 1;
@@ -221,7 +234,6 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int 
mem_size, int num_irq,
     }
 
     qemu_register_reset(armv7m_reset, cpu);
-    return nvic;
 }
 
 static Property bitband_properties[] = {
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 7e56f02..3f12b57 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1249,23 +1249,15 @@ static void stellaris_init(const char *kernel_filename, 
const char *cpu_model,
     vmstate_register_ram_global(sram);
     memory_region_add_subregion(system_memory, 0x20000000, sram);
 
-    nvic = armv7m_init(system_memory, flash_size, NUM_IRQ_LINES,
-                      kernel_filename, cpu_model);
+    armv7m_init(cpu_model);
+    qdev_prop_set_uint32(&first_cpu->parent_obj, "pmsav7-dregion", 8);
+    nvic = DEVICE(object_resolve_path("/machine/nvic", NULL));
+    qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES);
+    armv7m_realize(flash_size, kernel_filename);
 
     qdev_connect_gpio_out_named(nvic, "SYSRESETREQ", 0,
                                 qemu_allocate_irq(&do_sys_reset, NULL, 0));
 
-    {
-        /* hack to change the number of MPU regions.
-         * Less of a hack than messing with cpu_model string.
-         * Safe as long as the number is being reduced.
-         */
-        ARMCPU *cpu = ARM_CPU(qemu_get_cpu(0));
-        assert(cpu->pmsav7_dregion>=8);
-        cpu->pmsav7_dregion = 8;
-    }
-
-
     if (board->dc1 & (1 << 16)) {
         dev = sysbus_create_varargs(TYPE_STELLARIS_ADC, 0x40038000,
                                     qdev_get_gpio_in(nvic, 14),
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 3f99340..01ae1e7 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -87,8 +87,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, 
Error **errp)
     vmstate_register_ram_global(sram);
     memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
 
-    nvic = armv7m_init(get_system_memory(), FLASH_SIZE, 96,
-                       s->kernel_filename, s->cpu_model);
+    armv7m_init(s->cpu_model);
+    nvic = DEVICE(object_resolve_path("/machine/nvic", NULL));
+    qdev_prop_set_uint32(nvic, "num-irq", 96);
+    armv7m_realize(FLASH_SIZE, s->kernel_filename);
 
     /* System configuration controller */
     syscfgdev = DEVICE(&s->syscfg);
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index c26b0e3..2d81ff1 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -17,8 +17,8 @@
 #include "cpu.h"
 
 /* armv7m.c */
-DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int 
num_irq,
-                      const char *kernel_filename, const char *cpu_model);
+void armv7m_init(const char *cpu_model);
+void armv7m_realize(int mem_size, const char *kernel_filename);
 
 /*
  * struct used as a parameter of the arm_load_kernel machine init
-- 
2.1.4