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[Qemu-devel] [PULL 06/17] target-arm: Implement the S2 MMU inputsize > p
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/17] target-arm: Implement the S2 MMU inputsize > pamax check |
Date: |
Wed, 3 Feb 2016 18:59:09 +0000 |
From: "Edgar E. Iglesias" <address@hidden>
Implement the inputsize > pamax check for Stage 2 translations.
This is CONSTRAINED UNPREDICTABLE and we choose to fault.
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 31ff650..5ea507f 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6790,6 +6790,7 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64,
int level,
}
if (is_aa64) {
+ CPUARMState *env = &cpu->env;
unsigned int pamax = arm_pamax(cpu);
switch (stride) {
@@ -6811,6 +6812,13 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool
is_aa64, int level,
default:
g_assert_not_reached();
}
+
+ /* Inputsize checks. */
+ if (inputsize > pamax &&
+ (arm_el_is_aa64(env, 1) || inputsize > 40)) {
+ /* This is CONSTRAINED UNPREDICTABLE and we choose to fault. */
+ return false;
+ }
} else {
/* AArch32 only supports 4KB pages. Assert on that. */
assert(stride == 9);
--
1.9.1
- [Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to check_s2_mmu_setup, (continued)
- [Qemu-devel] [PULL 05/17] target-arm: Rename check_s2_startlevel to check_s2_mmu_setup, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 08/17] libvixl: Avoid std::abs() of 64-bit type, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 12/17] bcm2835_ic: add bcm2835 interrupt controller, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 11/17] bcm2835_property: add bcm2835 property channel, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 02/17] target-arm: Make various system registers visible to EL3, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 09/17] target-arm: Don't report presence of EL2 if it doesn't exist, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 03/17] hw/arm: Setup EL1 and EL2 in AArch64 mode for 64bit Linux boots, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 04/17] target-arm: Apply S2 MMU startlevel table size check to AArch64, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 10/17] bcm2835_mbox: add BCM2835 mailboxes, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 14/17] bcm2836_control: add bcm2836 ARM control logic, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 06/17] target-arm: Implement the S2 MMU inputsize > pamax check,
Peter Maydell <=
- [Qemu-devel] [PULL 07/17] arm: virt-acpi: each MADT.GICC entry as enabled unconditionally, Peter Maydell, 2016/02/03
- [Qemu-devel] [PULL 13/17] bcm2835_peripherals: add rollup device for bcm2835 peripherals, Peter Maydell, 2016/02/03
- Re: [Qemu-devel] [PULL 00/17] target-arm queue, Peter Maydell, 2016/02/04