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Re: [Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback


From: Eduardo Habkost
Subject: Re: [Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback
Date: Fri, 13 May 2016 14:33:07 -0300
User-agent: Mutt/1.5.24 (2015-08-30)

On Fri, May 06, 2016 at 10:53:46PM +0200, Radim Krčmář wrote:
> The memory-mapped interface cannot express x2APIC destinations that are
> a result of remapping.
> 
> Signed-off-by: Radim Krčmář <address@hidden>
> ---
>  hw/i386/intel_iommu.c | 29 ++++++++++++++++++-----------
>  1 file changed, 18 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index bee85e469477..d10064289551 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -26,6 +26,7 @@
>  #include "hw/pci/pci.h"
>  #include "hw/boards.h"
>  #include "hw/i386/x86-iommu.h"
> +#include "hw/i386/apic_internal.h"
>  
>  /*#define DEBUG_INTEL_IOMMU*/
>  #ifdef DEBUG_INTEL_IOMMU
> @@ -268,24 +269,33 @@ static void vtd_update_iotlb(IntelIOMMUState *s, 
> uint16_t source_id,
>      g_hash_table_replace(s->iotlb, key, entry);
>  }
>  
> +static void apic_deliver_msi(MSIMessage *msi)
> +{
> +    /* Conjure apic-bound msi delivery out of thin air. */
> +    X86CPU *cpu = X86_CPU(first_cpu);
> +    APICCommonState *apic_state = APIC_COMMON(cpu->apic_state);
> +    APICCommonClass *apic_class = APIC_COMMON_GET_CLASS(apic_state);

I see a pattern here:

hw/i386/kvmvapic.c-static void do_vapic_enable(void *data)
hw/i386/kvmvapic.c-{
[...]
hw/i386/kvmvapic.c-    X86CPU *cpu = X86_CPU(first_cpu);
[...]
hw/i386/kvmvapic.c:    apic_enable_vapic(cpu->apic_state, s->vapic_paddr);
[...]

hw/i386/pc.c-static void pic_irq_request(void *opaque, int irq, int level)
hw/i386/pc.c-{
hw/i386/pc.c-    CPUState *cs = first_cpu;
hw/i386/pc.c-    X86CPU *cpu = X86_CPU(cs);
[...]
hw/i386/pc.c:    if (cpu->apic_state) {
[...]


Time to write a common pc_get_first_apic() helper, or provide a
PCMachineState::first_apic field?

-- 
Eduardo



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