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[Qemu-devel] [PULL 16/65] target-mips: Use the new extract op
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 16/65] target-mips: Use the new extract op |
Date: |
Tue, 10 Jan 2017 18:17:31 -0800 |
Use extract for EXT and DEXT.
Reviewed-by: Yongbok Kim <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/mips/translate.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 57b824f..8deffa1 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -4488,11 +4488,12 @@ static void gen_bitops (DisasContext *ctx, uint32_t
opc, int rt,
if (lsb + msb > 31) {
goto fail;
}
- tcg_gen_shri_tl(t0, t1, lsb);
if (msb != 31) {
- tcg_gen_andi_tl(t0, t0, (1U << (msb + 1)) - 1);
+ tcg_gen_extract_tl(t0, t1, lsb, msb + 1);
} else {
- tcg_gen_ext32s_tl(t0, t0);
+ /* The two checks together imply that lsb == 0,
+ so this is a simple sign-extension. */
+ tcg_gen_ext32s_tl(t0, t1);
}
break;
#if defined(TARGET_MIPS64)
@@ -4507,10 +4508,7 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc,
int rt,
if (lsb + msb > 63) {
goto fail;
}
- tcg_gen_shri_tl(t0, t1, lsb);
- if (msb != 63) {
- tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1);
- }
+ tcg_gen_extract_tl(t0, t1, lsb, msb + 1);
break;
#endif
case OPC_INS:
--
2.9.3
- [Qemu-devel] [PULL 08/65] tcg/mips: Implement field extraction opcodes, (continued)
- [Qemu-devel] [PULL 08/65] tcg/mips: Implement field extraction opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 01/65] tcg: Add field extraction primitives, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 09/65] tcg/ppc: Implement field extraction opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 12/65] tcg/s390: Support deposit into zero, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 11/65] tcg/s390: Implement field extraction opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 10/65] tcg/s390: Expose host facilities to tcg-target.h, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 13/65] target-alpha: Use deposit and extract ops, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 19/65] tcg/optimize: Fold movcond 0/1 into setcond, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 14/65] target-arm: Use new deposit and extract ops, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 15/65] target-i386: Use new deposit and extract ops, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 16/65] target-mips: Use the new extract op,
Richard Henderson <=
- [Qemu-devel] [PULL 17/65] target-ppc: Use the new deposit and extract ops, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 18/65] target-s390x: Use the new deposit and extract ops, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 20/65] tcg: Add markup for output requires new register, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 21/65] tcg: Transition flat op_defs array to a target callback, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 23/65] tcg: Allow an operand to be matching or a constant, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 22/65] tcg: Pass the opcode width to target_parse_constraint, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 26/65] disas/ppc: Handle popcnt and cnttz, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 25/65] disas/i386.c: Handle tzcnt, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 27/65] target-alpha: Use the ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 29/65] target-microblaze: Use clz opcode, Richard Henderson, 2017/01/10