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[Qemu-devel] [PATCH v7 29/52] target/i386: check CF_PARALLEL instead of
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v7 29/52] target/i386: check CF_PARALLEL instead of parallel_cpus |
Date: |
Fri, 20 Oct 2017 16:20:00 -0700 |
From: "Emilio G. Cota" <address@hidden>
Thereby decoupling the resulting translated code from the current state
of the system.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/i386/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 2e2e0dbddc..70ba0b2d5a 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -5307,7 +5307,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState
*cpu)
if (!(s->cpuid_ext_features & CPUID_EXT_CX16))
goto illegal_op;
gen_lea_modrm(env, s, modrm);
- if ((s->prefix & PREFIX_LOCK) && parallel_cpus) {
+ if ((s->prefix & PREFIX_LOCK) && (tb_cflags(s->base.tb) &
CF_PARALLEL)) {
gen_helper_cmpxchg16b(cpu_env, cpu_A0);
} else {
gen_helper_cmpxchg16b_unlocked(cpu_env, cpu_A0);
@@ -5318,7 +5318,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState
*cpu)
if (!(s->cpuid_features & CPUID_CX8))
goto illegal_op;
gen_lea_modrm(env, s, modrm);
- if ((s->prefix & PREFIX_LOCK) && parallel_cpus) {
+ if ((s->prefix & PREFIX_LOCK) && (tb_cflags(s->base.tb) &
CF_PARALLEL)) {
gen_helper_cmpxchg8b(cpu_env, cpu_A0);
} else {
gen_helper_cmpxchg8b_unlocked(cpu_env, cpu_A0);
--
2.13.6
- [Qemu-devel] [PATCH v7 21/52] tcg: Use offsets not indices for TCGv_*, (continued)
- [Qemu-devel] [PATCH v7 21/52] tcg: Use offsets not indices for TCGv_*, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 20/52] qom: Introduce CPUClass.tcg_initialize, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 23/52] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 25/52] tcg: Include CF_COUNT_MASK in CF_HASH_MASK, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 19/52] tcg: Remove TCGV_EQUAL*, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 24/52] tcg: Add CPUState cflags_next_tb, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 29/52] target/i386: check CF_PARALLEL instead of parallel_cpus,
Richard Henderson <=
- [Qemu-devel] [PATCH v7 28/52] target/hppa: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 27/52] target/arm: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 30/52] target/m68k: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 26/52] tcg: convert tb->cflags reads to tb_cflags(tb), Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 32/52] target/sh4: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 31/52] target/s390x: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 33/52] target/sparc: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 34/52] tcg: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 35/52] cpu-exec: lookup/generate TB outside exclusive region during step_atomic, Richard Henderson, 2017/10/20
- [Qemu-devel] [PATCH v7 36/52] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK, Richard Henderson, 2017/10/20