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[Qemu-devel] [PULL 04/25] imx_serial: Generate interrupt on receive data
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/25] imx_serial: Generate interrupt on receive data ready if enabled |
Date: |
Mon, 20 Aug 2018 11:31:51 +0100 |
From: Hans-Erik Floryd <address@hidden>
Generate an interrupt if USR2_RDR and UCR4_DREN are both set.
Signed-off-by: Hans-Erik Floryd <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/char/imx_serial.h | 1 +
hw/char/imx_serial.c | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h
index ee80da12e60..c8b74284f87 100644
--- a/include/hw/char/imx_serial.h
+++ b/include/hw/char/imx_serial.h
@@ -68,6 +68,7 @@
#define UCR2_RXEN (1<<1) /* Receiver enable */
#define UCR2_SRST (1<<0) /* Reset complete */
+#define UCR4_DREN BIT(0) /* Receive Data Ready interrupt enable */
#define UCR4_TCEN BIT(3) /* TX complete interrupt enable */
#define UTS1_TXEMPTY (1<<6)
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 0747db9f2b9..1e363190e3d 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -74,8 +74,9 @@ static void imx_update(IMXSerialState *s)
mask = (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0;
/*
* TCEN and TXDC are both bit 3
+ * RDR and DREN are both bit 0
*/
- mask |= s->ucr4 & UCR4_TCEN;
+ mask |= s->ucr4 & (UCR4_TCEN | UCR4_DREN);
usr2 = s->usr2 & mask;
--
2.18.0
- [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 07/25] target/arm: Implement AArch32 HVBAR, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 06/25] target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 05/25] target/arm: Correct typo in HAMAIR1 regdef name, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 04/25] imx_serial: Generate interrupt on receive data ready if enabled,
Peter Maydell <=
- [Qemu-devel] [PULL 08/25] target/arm: Implement AArch32 Hyp FARs, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 11/25] target/arm: Implement AArch32 ERET instruction, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 10/25] target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked), Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 13/25] sdhci: add i.MX SD Stable Clock bit, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 12/25] hw/arm/virt: Add virt-3.1 machine type, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 03/25] hw/intc/arm_gicv3_its: downgrade error_report to warn_report in kvm_arm_its_reset, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 17/25] hw/timer/m48t59: Move away from old_mmio accessors, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 14/25] hw/ssi/xilinx_spips: Remove unneeded MMIO request_ptr code, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 09/25] target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2, Peter Maydell, 2018/08/20
- [Qemu-devel] [PULL 16/25] hw/misc: Remove mmio_interface device, Peter Maydell, 2018/08/20