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[Qemu-devel] [PULL 28/52] hw/misc/iotkit: Wire up the sysctl and sysinfo
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 28/52] hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks |
Date: |
Fri, 24 Aug 2018 10:33:19 +0100 |
Wire up the system control element's register banks
(sysctl and sysinfo).
This is the last of the previously completely unimplemented
components in the IoTKit.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
include/hw/arm/iotkit.h | 6 +++++-
hw/arm/iotkit.c | 26 ++++++++++++++++++--------
2 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/include/hw/arm/iotkit.h b/include/hw/arm/iotkit.h
index 0f5c5101708..426dc326a0d 100644
--- a/include/hw/arm/iotkit.h
+++ b/include/hw/arm/iotkit.h
@@ -58,7 +58,8 @@
#include "hw/timer/cmsdk-apb-timer.h"
#include "hw/timer/cmsdk-apb-dualtimer.h"
#include "hw/watchdog/cmsdk-apb-watchdog.h"
-#include "hw/misc/unimp.h"
+#include "hw/misc/iotkit-sysctl.h"
+#include "hw/misc/iotkit-sysinfo.h"
#include "hw/or-irq.h"
#include "hw/core/split-irq.h"
@@ -97,6 +98,9 @@ typedef struct IoTKit {
CMSDKAPBWatchdog nswatchdog;
CMSDKAPBWatchdog swatchdog;
+ IoTKitSysCtl sysctl;
+ IoTKitSysCtl sysinfo;
+
MemoryRegion container;
MemoryRegion alias1;
MemoryRegion alias2;
diff --git a/hw/arm/iotkit.c b/hw/arm/iotkit.c
index cb0ec456f39..f8276b5425c 100644
--- a/hw/arm/iotkit.c
+++ b/hw/arm/iotkit.c
@@ -16,7 +16,6 @@
#include "hw/sysbus.h"
#include "hw/registerfields.h"
#include "hw/arm/iotkit.h"
-#include "hw/misc/unimp.h"
#include "hw/arm/arm.h"
/* Clock frequency in HZ of the 32KHz "slow clock" */
@@ -151,6 +150,10 @@ static void iotkit_init(Object *obj)
sizeof(s->nswatchdog), TYPE_CMSDK_APB_WATCHDOG);
sysbus_init_child_obj(obj, "swatchdog", &s->swatchdog,
sizeof(s->swatchdog), TYPE_CMSDK_APB_WATCHDOG);
+ sysbus_init_child_obj(obj, "iotkit-sysctl", &s->sysctl,
+ sizeof(s->sysctl), TYPE_IOTKIT_SYSCTL);
+ sysbus_init_child_obj(obj, "iotkit-sysinfo", &s->sysinfo,
+ sizeof(s->sysinfo), TYPE_IOTKIT_SYSINFO);
object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate,
sizeof(s->nmi_orgate), TYPE_OR_IRQ,
&error_abort, NULL);
@@ -516,13 +519,20 @@ static void iotkit_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(dev_apb_ppc1,
"cfg_sec_resp", 0));
- /* Using create_unimplemented_device() maps the stub into the
- * system address space rather than into our container, but the
- * overall effect to the guest is the same.
- */
- create_unimplemented_device("SYSINFO", 0x40020000, 0x1000);
-
- create_unimplemented_device("SYSCONTROL", 0x50021000, 0x1000);
+ object_property_set_bool(OBJECT(&s->sysinfo), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ /* System information registers */
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysinfo), 0, 0x40020000);
+ /* System control registers */
+ object_property_set_bool(OBJECT(&s->sysctl), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysctl), 0, 0x50021000);
/* This OR gate wires together outputs from the secure watchdogs to NMI */
object_property_set_int(OBJECT(&s->nmi_orgate), 2, "num-lines", &err);
--
2.18.0
- [Qemu-devel] [PULL 19/52] hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters, (continued)
- [Qemu-devel] [PULL 19/52] hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 14/52] target/arm: Implement AArch32 HCR and HCR2, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 17/52] target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 20/52] hw/misc/mps2-fpgaio: Implement PSCNTR and COUNTER, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 21/52] hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer module, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 22/52] hw/arm/iotkit: Wire up the dualtimer, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 23/52] hw/arm/mps2: Wire up dual-timer in mps2-an385 and mps2-an511, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 24/52] hw/arm/iotkit: Wire up the watchdogs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 25/52] hw/arm/iotkit: Wire up the S32KTIMER, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 26/52] hw/misc/iotkit-sysctl: Implement IoTKit system control element, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 28/52] hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks,
Peter Maydell <=
- [Qemu-devel] [PULL 27/52] hw/misc/iotkit-sysinfo: Implement IoTKit system information block, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 31/52] hw/arm/iotkit: Wire up the lines for MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 32/52] hw/arm/mps2-tz: Create PL081s and MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 30/52] hw/misc/iotkit-secctl: Wire up registers for controlling MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 33/52] hw/ssi/pl022: Allow use as embedded-struct device, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 29/52] hw/misc/tz-msc: Model TrustZone Master Security Controller, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 37/52] hw/ssi/pl022: Correct wrong value for PL022_INT_RT, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 38/52] hw/ssi/pl022: Correct wrong DMACR and ICR handling, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 39/52] hw/arm/mps2-tz: Instantiate SPI controllers, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 43/52] target/arm: Remove a handful of stray tabs, Peter Maydell, 2018/08/24