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[Qemu-devel] [PULL 33/52] hw/ssi/pl022: Allow use as embedded-struct dev
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 33/52] hw/ssi/pl022: Allow use as embedded-struct device |
Date: |
Fri, 24 Aug 2018 10:33:24 +0100 |
Create a new include file for the pl022's device struct,
type macros, etc, so that it can be instantiated using
the "embedded struct" coding style.
While we're adding the new file to MAINTAINERS, add
also the .c file, which was missing an entry.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Richard Henderson <address@hidden>
---
include/hw/ssi/pl022.h | 51 ++++++++++++++++++++++++++++++++++++++++++
hw/ssi/pl022.c | 26 +--------------------
MAINTAINERS | 2 ++
3 files changed, 54 insertions(+), 25 deletions(-)
create mode 100644 include/hw/ssi/pl022.h
diff --git a/include/hw/ssi/pl022.h b/include/hw/ssi/pl022.h
new file mode 100644
index 00000000000..a080519366d
--- /dev/null
+++ b/include/hw/ssi/pl022.h
@@ -0,0 +1,51 @@
+/*
+ * ARM PrimeCell PL022 Synchronous Serial Port
+ *
+ * Copyright (c) 2007 CodeSourcery.
+ * Written by Paul Brook
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+/* This is a model of the Arm PrimeCell PL022 synchronous serial port.
+ * The PL022 TRM is:
+ *
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
+ *
+ * QEMU interface:
+ * + sysbus IRQ: SSPINTR combined interrupt line
+ * + sysbus MMIO region 0: MemoryRegion for the device's registers
+ */
+
+#ifndef HW_SSI_PL022_H
+#define HW_SSI_PL022_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_PL022 "pl022"
+#define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022)
+
+typedef struct PL022State {
+ SysBusDevice parent_obj;
+
+ MemoryRegion iomem;
+ uint32_t cr0;
+ uint32_t cr1;
+ uint32_t bitmask;
+ uint32_t sr;
+ uint32_t cpsr;
+ uint32_t is;
+ uint32_t im;
+ /* The FIFO head points to the next empty entry. */
+ int tx_fifo_head;
+ int rx_fifo_head;
+ int tx_fifo_len;
+ int rx_fifo_len;
+ uint16_t tx_fifo[8];
+ uint16_t rx_fifo[8];
+ qemu_irq irq;
+ SSIBus *ssi;
+} PL022State;
+
+#endif
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index c1368018ee3..379d3093987 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "hw/ssi/pl022.h"
#include "hw/ssi/ssi.h"
#include "qemu/log.h"
@@ -41,31 +42,6 @@ do { fprintf(stderr, "pl022: error: " fmt , ##
__VA_ARGS__);} while (0)
#define PL022_INT_RX 0x04
#define PL022_INT_TX 0x08
-#define TYPE_PL022 "pl022"
-#define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022)
-
-typedef struct PL022State {
- SysBusDevice parent_obj;
-
- MemoryRegion iomem;
- uint32_t cr0;
- uint32_t cr1;
- uint32_t bitmask;
- uint32_t sr;
- uint32_t cpsr;
- uint32_t is;
- uint32_t im;
- /* The FIFO head points to the next empty entry. */
- int tx_fifo_head;
- int rx_fifo_head;
- int tx_fifo_len;
- int rx_fifo_len;
- uint16_t tx_fifo[8];
- uint16_t rx_fifo[8];
- qemu_irq irq;
- SSIBus *ssi;
-} PL022State;
-
static const unsigned char pl022_id[8] =
{ 0x22, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
diff --git a/MAINTAINERS b/MAINTAINERS
index b2f8b562dc5..1e81ad8d4b1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -451,6 +451,8 @@ F: hw/gpio/pl061.c
F: hw/input/pl050.c
F: hw/intc/pl190.c
F: hw/sd/pl181.c
+F: hw/ssi/pl022.c
+F: include/hw/ssi/pl022.h
F: hw/timer/pl031.c
F: include/hw/arm/primecell.h
F: hw/timer/cmsdk-apb-timer.c
--
2.18.0
- [Qemu-devel] [PULL 22/52] hw/arm/iotkit: Wire up the dualtimer, (continued)
- [Qemu-devel] [PULL 22/52] hw/arm/iotkit: Wire up the dualtimer, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 23/52] hw/arm/mps2: Wire up dual-timer in mps2-an385 and mps2-an511, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 24/52] hw/arm/iotkit: Wire up the watchdogs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 25/52] hw/arm/iotkit: Wire up the S32KTIMER, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 26/52] hw/misc/iotkit-sysctl: Implement IoTKit system control element, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 28/52] hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 27/52] hw/misc/iotkit-sysinfo: Implement IoTKit system information block, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 31/52] hw/arm/iotkit: Wire up the lines for MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 32/52] hw/arm/mps2-tz: Create PL081s and MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 30/52] hw/misc/iotkit-secctl: Wire up registers for controlling MSCs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 33/52] hw/ssi/pl022: Allow use as embedded-struct device,
Peter Maydell <=
- [Qemu-devel] [PULL 29/52] hw/misc/tz-msc: Model TrustZone Master Security Controller, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 37/52] hw/ssi/pl022: Correct wrong value for PL022_INT_RT, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 38/52] hw/ssi/pl022: Correct wrong DMACR and ICR handling, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 39/52] hw/arm/mps2-tz: Instantiate SPI controllers, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 43/52] target/arm: Remove a handful of stray tabs, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 40/52] hw/arm/mps2-tz: Fix MPS2 SCC config register values, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 42/52] target/arm: Untabify iwmmxt_helper.c, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 36/52] hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 34/52] hw/ssi/pl022: Set up reset function in class init, Peter Maydell, 2018/08/24
- [Qemu-devel] [PULL 47/52] hw/display/bcm2835_fb: Reset resolution, etc correctly, Peter Maydell, 2018/08/24