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Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU
From: |
Fredrik Noring |
Subject: |
Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU |
Date: |
Wed, 26 Sep 2018 19:44:06 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
Hi Jürgen, Maciej,
> The original website is down, but there is a backup:
> http://ps2linux.no-ip.info/playstation2-linux.com/faq.html#Availability__When_Where_and_how_much
>
> There was also the question to release the documents for free.
> http://ps2linux.no-ip.info/playstation2-linux.com/forum/message23e0.html?msg_id=51027
Thanks, Jürgen!
> > > > + .CP0_PRid = 0x00003800,
> > >
> > > "The implementation number of the C790 processor is 0x38".
> >
> > I'll leave the answer to what the values of PRId are for the R5900 vs the
> > C790 to Fredrik or Jürgen. I suspect that the difference is in the Rev
> > field only.
>
> According to the documentation tx79architecture.pdf the C790 has 0x3800.
> According to the documentation coreum_e.pdf the R5900 has 0x2Exx.
> xx depends on the revision. I thought that I have seen several revisions,
> but in my log files I found only 0x2e31.
I have verified with hardware that model SCPH-77004 is 0x2e42 whereas an
older model such as SCPH-50004 is 0x2e31. Someone has made a substantial
table of models at
http://www.ps2-home.com/forum/app.php/page/ps2ident-database
where the columns "EE implementation" and "EE revision" correspond to PRId.
Fredrik
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, (continued)
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/24
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Fredrik Noring, 2018/09/27
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/28
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Jürgen Urban, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU,
Fredrik Noring <=
Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/24
[Qemu-devel] [PATCH v5 5/8] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only, Fredrik Noring, 2018/09/19
[Qemu-devel] [PATCH v5 7/8] linux-user/mips: Recognise the R5900 CPU model, Fredrik Noring, 2018/09/19
[Qemu-devel] [PATCH v5 8/8] elf: Toshiba/Sony rather than MIPS are the implementors of the R5900, Fredrik Noring, 2018/09/19
Re: [Qemu-devel] [PATCH v5 0/8] target/mips: Support R5900 GCC programs in user mode, Aleksandar Markovic, 2018/09/20