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Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU |
Date: |
Fri, 28 Sep 2018 17:50:18 +0200 |
On Thu, Sep 27, 2018 at 7:11 PM Fredrik Noring <address@hidden> wrote:
>
> Thank you for your reviews, Philippe,
>
> > Fredrik: maybe you can simply name the C790 in the comment pointing to
> > the DS documentation.
>
> Sure, I will do that for v6! I am also adding some of Maciej's notes on the
> differences between the C790 and the R5900, along with PRId 0X2E00 as noted
> by Jürgen:
>
> {
> /*
> * The Toshiba TX System RISC TX79 Core Architecture manual
> *
> * http://www.lukasz.dk/files/tx79architecture.pdf
> *
> * describes the C790 processor which is a follow-up to the R5900.
> * There are a few notable differences in that the R5900 FPU
> *
> * - is not fully IEEE 754-1985 compliant,
> * - does not implement double format, and
> * - its machine code is nonstandard.
> */
> .name = "R5900",
> .CP0_PRid = 0x00002E00,
>
> > Fredrik, except the linux-user part for kernel FPU emulation that I
> > don't feel confident to review, the rest of this patch looks OK to me:
> > Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
>
> Would you rather have an acked-by as a less formal "looks good to me" tag?
QEMU 'Acked-by' means "I'm the maintainer for this area and I haven't
actually reviewed this but I don't object to it" as I learned here :)
https://lists.gnu.org/archive/html/qemu-devel/2017-11/msg02186.html
> I anticipate significant changes to the notes and commit messages in v6,
> so all previous tags ought to be reset for that reason, I think.
Just reset, I'm happy to review this series.
Regards,
Phil.
- [Qemu-devel] [PATCH v5 3/8] target/mips: Support R5900 instructions MOVN, MOVZ and PREF from MIPS IV, (continued)
- [Qemu-devel] [PATCH v5 3/8] target/mips: Support R5900 instructions MOVN, MOVZ and PREF from MIPS IV, Fredrik Noring, 2018/09/19
- [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Fredrik Noring, 2018/09/19
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/20
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/24
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Maciej W. Rozycki, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Fredrik Noring, 2018/09/27
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU,
Philippe Mathieu-Daudé <=
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Jürgen Urban, 2018/09/25
- Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Fredrik Noring, 2018/09/26
Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU, Philippe Mathieu-Daudé, 2018/09/24
[Qemu-devel] [PATCH v5 5/8] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only, Fredrik Noring, 2018/09/19
[Qemu-devel] [PATCH v5 7/8] linux-user/mips: Recognise the R5900 CPU model, Fredrik Noring, 2018/09/19
[Qemu-devel] [PATCH v5 8/8] elf: Toshiba/Sony rather than MIPS are the implementors of the R5900, Fredrik Noring, 2018/09/19
Re: [Qemu-devel] [PATCH v5 0/8] target/mips: Support R5900 GCC programs in user mode, Aleksandar Markovic, 2018/09/20