Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
4eec05709e target/riscv: Remaining rvc insn reuse 32 bit translators
84199f4926 target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
5a78019a67 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
5bec6a64b6 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
47611045c0 target/riscv: Convert @cs_2 insns to share translation functions
3c4c483491 target/riscv: Remove decode_RV32_64G()
6ef8c39fa6 target/riscv: Remove gen_system()
9fe3e55d2b target/riscv: Rename trans_arith to gen_arith
9d2d48ec02 target/riscv: Remove manual decoding of RV32/64M insn
e2794103f7 target/riscv: Remove shift and slt insn manual decoding
d30d015ce4 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
a2e6454b6a target/riscv: Move gen_arith_imm() decoding into trans_* functions
fda235c1ce target/riscv: Remove manual decoding from gen_store()
b67503bc42 target/riscv: Remove manual decoding from gen_load()
e465b8aaaf target/riscv: Remove manual decoding from gen_branch()
23e6c18a44 target/riscv: Remove gen_jalr()
31b752d15c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
a01808aab6 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b50a3640f1 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
e5f7eef8ad target/riscv: Convert RV priv insns to decodetree
4e1d2b7b33 target/riscv: Convert RV64D insns to decodetree
17e3bea420 target/riscv: Convert RV32D insns to decodetree
c104db76b0 target/riscv: Convert RV64F insns to decodetree
20d85db11f target/riscv: Convert RV32F insns to decodetree
dcfa5c66e6 target/riscv: Convert RV64A insns to decodetree
90c9f7a5d8 target/riscv: Convert RV32A insns to decodetree
177c22347c target/riscv: Convert RVXM insns to decodetree
aeacaf087c target/riscv: Convert RVXI csr insns to decodetree
6d4b3813f2 target/riscv: Convert RVXI fence insns to decodetree
5f1a4b443e target/riscv: Convert RVXI arithmetic insns to decodetree
3e4657c256 target/riscv: Convert RV64I load/store insns to decodetree
fa8fd7f53a target/riscv: Convert RV32I load/store insns to decodetree
856c75bdfa target/riscv: Convert RVXI branch insns to decodetree
7f807ad471 target/riscv: Activate decodetree and implemnt LUI & AUIPC
3f3a36b6c1 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 3f3a36b6c144 (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit 7f807ad4718f (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 856c75bdfab3 (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit fa8fd7f53ac6 (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit 3e4657c25667 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 5f1a4b443eba (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit 6d4b3813f270 (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit aeacaf087c3e (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit 177c22347c20 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 90c9f7a5d8ff (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit dcfa5c66e65d (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit 20d85db11f67 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit c104db76b052 (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 17e3bea4206f (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 4e1d2b7b333a (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit e5f7eef8ad73 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit b50a3640f1d0 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit a01808aab6ef (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit 31b752d15c25 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 23e6c18a442b (target/riscv: Remove gen_jalr())
21/35 Checking commit e465b8aaafd9 (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit b67503bc4283 (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit fda235c1ce28 (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit a2e6454b6a25 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit d30d015ce4f4 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit e2794103f742 (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit 9d2d48ec02ae (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit 9fe3e55d2b31 (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 6ef8c39fa624 (target/riscv: Remove gen_system())
30/35 Checking commit 3c4c4834911b (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 47611045c029 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 5bec6a64b680 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit 5a78019a6709 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 84199f492604 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 4eec05709e0f (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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