[Simulavr-devel] Small patch series for simulavrxx

[Onno Kortmann]

Hi,

what follows a series of patches for simulavrxx which I think are
mostly of discussion/development quality. I'll rather submit them now
before they desync to CVS HEAD too much :-)

The patches should apply in the order in which they are marked.

I will send the following things:

Fixes
-----
The fixes are pretty obvious and IMHO ready to apply. Note that 
I still use autotools, so for some of the things below, the
Makefile needs to be adjusted. Autotools work fine 
for me (with some tweaking, though...)


Factory
-------
Incomplete code is in CVS already, this gets an abstract AVR factory
to work (to avoid having all kinds of dependencies on AVR devices
everywhere in the code).


Fab
---
Patch 10/13 is a very incomplete start of a converter (in python)
to automatically produce AVR device classes from the Atmel XML part
description files (only the 15l and the tiny2313 are produced,
incompletely, as far as I needed the functionality :-). 

To use this, put the XML part descriptions from Atmels AVRStudio
into the src/fab/atmel-xml directory and run the avr-fab.py script.
You need 'python cheetah' to process the templates.

If this would be the way to go, license issues have to be worked out,
of course but if everyone 
does this step him- or herself, that should be safe(?) Maybe one
could ask Atmel if they're ok with distributing something derived
of their XML, after all it's only the same info as out of the
datasheet.

Do not complain about the similarity fab/factory :-)

Verilog interface
-----------------
vpi: The code has more into simulavrxx entries now and less memory
leaks and has subject to an overall clean-up.

examples: There is a 'real world' example now (a single pin protocol
being simulated with verilog and tested with real hardware
in my hobby lab :-).


What are your thoughts?

Greetings,

Onno