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Re: [Simulavr-devel] anacomp getting reserved access messages
From: |
Joel Sherrill |
Subject: |
Re: [Simulavr-devel] anacomp getting reserved access messages |
Date: |
Thu, 26 Mar 2009 08:11:39 -0500 |
User-agent: |
Thunderbird 2.0.0.21 (X11/20090320) |
I captured a trace and deleted all of the stuff below the error.
It appears to be happening very early in main.c.
Look for RESERVED.
--joel
Joel Sherrill wrote:
Schwichtenberg, Knut wrote:
Joel,
here you find a usage for "-W 0x20,-". 0x20 in the RAM-Area of the AVR is identicall to 0x00 in the IO-Space which is forbidden by most AVR's. This loop puts normally 10.000 "*" on you terminal. Maybe it's in there to delay or only to confuse the maintainer ;-).
I thought of that but there was no way to turn that on via Tcl
until I did my work. So I guess this is just a left over hunk of code.
BTW: The comment block at the top of the source is fully nonsense in
conjunction with the source code.
:)
The 0x5e - I'm guessing - might have to do with compiling the source for CPU A
and using it on CPU B, is it?
The reserved message can also come out when the CPU
.cpp file has temporarily marked it as such.
set dev1 [new_AvrDevice_at90s4433]
And this code is in that cpu
rw[0x5e]= new RWReserved(this);
Is this a known register name?
Knut
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0 anacomp 0x0000:
,.stab,.stabstr,main.c,__tmp_reg__,__zero_reg__,__vectors,__vector_default,__heap_end
RJMP 1c
16000 anacomp 0x001c:
__trampolines_start,__trampolines_end,__dtors_end,__init,__ctors_start,__dtors_start,__ctors_end
CPU-waitstate
32000 anacomp 0x001c:
__trampolines_start,__trampolines_end,__dtors_end,__init,__ctors_start,__dtors_start,__ctors_end
EOR R1, R1 R1=0x00 SREG=[------Z-]
48000 anacomp 0x001e:
__trampolines_start,__trampolines_end,__dtors_end,__init,__ctors_start,__dtors_start,__ctors_end+0x1
OUT 0x3f, R1 SREG=[--------]
64000 anacomp 0x0020:
__trampolines_start,__trampolines_end,__dtors_end,__init,__ctors_start,__dtors_start,__ctors_end+0x2
LDI R28, 0xdf R28=0xdf Y=0x00df
80000 anacomp 0x0022:
__trampolines_start,__trampolines_end,__dtors_end,__init,__ctors_start,__dtors_start,__ctors_end+0x3
OUT 0x3d, R28 SP=0xdf
96000 anacomp 0x0024: __do_copy_data LDI R17, 0x00 R17=0x00
112000 anacomp 0x0026: __do_copy_data+0x1 LDI R26, 0x60 R26=0x60
X=0x0060
128000 anacomp 0x0028: __do_copy_data+0x2 LDI R27, 0x00 R27=0x00
X=0x0060
144000 anacomp 0x002a: __do_copy_data+0x3 LDI R30, 0x80 R30=0x80
Z=0x0080
160000 anacomp 0x002c: __do_copy_data+0x4 LDI R31, 0x00 R31=0x00
Z=0x0080
176000 anacomp 0x002e: __do_copy_data+0x5 RJMP 36
192000 anacomp 0x0036: .do_copy_data_start CPU-waitstate
208000 anacomp 0x0036: .do_copy_data_start CPI R26, 0x60
SREG=[------Z-]
224000 anacomp 0x0038: .do_copy_data_start+0x1 CPC R27, R17
SREG=[------Z-]
240000 anacomp 0x003a: .do_copy_data_start+0x2 BRNE ->0x0030
.do_copy_data_loop
256000 anacomp 0x003c: __SP_L__,__do_clear_bss LDI R17, 0x00 R17=0x00
272000 anacomp 0x003e: __SREG__,__SP_H__ LDI R26, 0x60 R26=0x60
X=0x0060
288000 anacomp 0x0040: __SREG__,__SP_H__+0x1 LDI R27, 0x00 R27=0x00
X=0x0060
304000 anacomp 0x0042: __SREG__,__SP_H__+0x2 RJMP 46
320000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
336000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[--H-VN-C]
352000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
368000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
384000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
400000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0060,.bss,compReady,__data_end,__bss_start,_edata,__data_start]=0x00
R26=0x61 X=0x0061 R27=0x00 X=0x0061
416000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
432000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
448000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
464000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
480000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
496000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0061,results]=0x00 R26=0x62 X=0x0062 R27=0x00 X=0x0062
512000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
528000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
544000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
560000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
576000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
592000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0062,results+0x1]=0x00 R26=0x63 X=0x0063 R27=0x00 X=0x0063
608000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
624000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
640000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
656000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
672000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
688000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0063,results+0x2]=0x00 R26=0x64 X=0x0064 R27=0x00 X=0x0064
704000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
720000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
736000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
752000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
768000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
784000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0064,results+0x3]=0x00 R26=0x65 X=0x0065 R27=0x00 X=0x0065
800000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
816000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
832000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
848000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
864000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
880000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0065,results+0x4]=0x00 R26=0x66 X=0x0066 R27=0x00 X=0x0066
896000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
912000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
928000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
944000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
960000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
976000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0066,results+0x5]=0x00 R26=0x67 X=0x0067 R27=0x00 X=0x0067
992000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1008000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1024000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1040000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1056000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1072000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0067,results+0x6]=0x00 R26=0x68 X=0x0068 R27=0x00 X=0x0068
1088000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1104000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1120000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1136000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1152000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1168000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0068,results+0x7]=0x00 R26=0x69 X=0x0069 R27=0x00 X=0x0069
1184000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1200000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1216000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1232000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1248000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1264000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0069,results+0x8]=0x00 R26=0x6a X=0x006a R27=0x00 X=0x006a
1280000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1296000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1312000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1328000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1344000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1360000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006a,results+0x9]=0x00 R26=0x6b X=0x006b R27=0x00 X=0x006b
1376000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1392000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1408000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1424000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1440000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1456000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006b,results+0xa]=0x00 R26=0x6c X=0x006c R27=0x00 X=0x006c
1472000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1488000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1504000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1520000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1536000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1552000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006c,results+0xb]=0x00 R26=0x6d X=0x006d R27=0x00 X=0x006d
1568000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1584000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1600000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1616000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1632000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1648000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006d,results+0xc]=0x00 R26=0x6e X=0x006e R27=0x00 X=0x006e
1664000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1680000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1696000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1712000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1728000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1744000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006e,results+0xd]=0x00 R26=0x6f X=0x006f R27=0x00 X=0x006f
1760000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1776000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1792000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1808000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1824000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1840000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x006f,results+0xe]=0x00 R26=0x70 X=0x0070 R27=0x00 X=0x0070
1856000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1872000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[--H-VN-C]
1888000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
1904000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
1920000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
1936000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0070,results+0xf]=0x00 R26=0x71 X=0x0071 R27=0x00 X=0x0071
1952000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
1968000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
1984000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2000000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2016000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2032000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0071,results+0x10]=0x00 R26=0x72 X=0x0072 R27=0x00 X=0x0072
2048000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2064000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2080000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2096000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2112000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2128000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0072,results+0x11]=0x00 R26=0x73 X=0x0073 R27=0x00 X=0x0073
2144000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2160000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2176000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2192000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2208000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2224000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0073,results+0x12]=0x00 R26=0x74 X=0x0074 R27=0x00 X=0x0074
2240000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2256000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2272000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2288000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2304000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2320000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0074,results+0x13]=0x00 R26=0x75 X=0x0075 R27=0x00 X=0x0075
2336000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2352000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2368000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2384000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2400000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2416000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0075,results+0x14]=0x00 R26=0x76 X=0x0076 R27=0x00 X=0x0076
2432000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2448000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2464000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2480000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2496000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2512000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0076,results+0x15]=0x00 R26=0x77 X=0x0077 R27=0x00 X=0x0077
2528000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2544000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2560000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2576000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2592000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2608000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0077,results+0x16]=0x00 R26=0x78 X=0x0078 R27=0x00 X=0x0078
2624000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2640000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2656000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2672000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2688000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2704000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0078,results+0x17]=0x00 R26=0x79 X=0x0079 R27=0x00 X=0x0079
2720000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2736000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2752000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2768000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2784000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2800000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0079,results+0x18]=0x00 R26=0x7a X=0x007a R27=0x00 X=0x007a
2816000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2832000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2848000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2864000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2880000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2896000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007a,results+0x19]=0x00 R26=0x7b X=0x007b R27=0x00 X=0x007b
2912000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
2928000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
2944000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
2960000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
2976000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
2992000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007b,results+0x1a]=0x00 R26=0x7c X=0x007c R27=0x00 X=0x007c
3008000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3024000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
3040000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
3056000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
3072000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
3088000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007c,results+0x1b]=0x00 R26=0x7d X=0x007d R27=0x00 X=0x007d
3104000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3120000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
3136000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
3152000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
3168000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
3184000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007d,results+0x1c]=0x00 R26=0x7e X=0x007e R27=0x00 X=0x007e
3200000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3216000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
3232000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
3248000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
3264000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
3280000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007e,results+0x1d]=0x00 R26=0x7f X=0x007f R27=0x00 X=0x007f
3296000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3312000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[----VN-C]
3328000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
3344000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
3360000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
3376000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x007f,results+0x1e]=0x00 R26=0x80 X=0x0080 R27=0x00 X=0x0080
3392000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3408000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[--HS-N-C]
3424000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[--HS-N-C]
3440000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
__SP_L__,__do_clear_bss
3456000 anacomp 0x0044: .do_clear_bss_loop CPU-waitstate
3472000 anacomp 0x0044: .do_clear_bss_loop ST X+, R1
IRAM[0x0080,results+0x1f]=0x00 R26=0x81 X=0x0081 R27=0x00 X=0x0081
3488000 anacomp 0x0046: .do_clear_bss_start CPU-waitstate
3504000 anacomp 0x0046: .do_clear_bss_start CPI R26, 0x81
SREG=[------Z-]
3520000 anacomp 0x0048: .do_clear_bss_start+0x1 CPC R27, R17
SREG=[------Z-]
3536000 anacomp 0x004a: .do_clear_bss_start+0x2 BRNE ->0x0044
.do_clear_bss_loop
3552000 anacomp 0x004c: .do_clear_bss_start+0x3 RCALL 52
IRAM[0x00df,__bss_end+0x5e]=0x27 SP=0xde IRAM[0x00de,__bss_end+0x5d]=0x00
SP=0xdd
3568000 anacomp 0x0052: main CPU-waitstate
3584000 anacomp 0x0052: main CPU-waitstate
3600000 anacomp 0x0052: main PUSH R29
IRAM[0x00dd,__bss_end+0x5c]=0x00 SP=0xdc
3616000 anacomp 0x0054: main+0x1 CPU-waitstate
3632000 anacomp 0x0054: main+0x1 PUSH R28
IRAM[0x00dc,__bss_end+0x5b]=0xdf SP=0xdb
3648000 anacomp 0x0056: main+0x2 CPU-waitstate
3664000 anacomp 0x0056: main+0x2 RCALL 58
IRAM[0x00db,__bss_end+0x5a]=0x2c SP=0xda IRAM[0x00da,__bss_end+0x59]=0x00
SP=0xd9
3680000 anacomp 0x0058: main+0x3 CPU-waitstate
3696000 anacomp 0x0058: main+0x3 CPU-waitstate
3712000 anacomp 0x0058: main+0x3 IN R28, 0x3d R28=0xd9
Y=0x00d9
3728000 anacomp 0x005a: main+0x4 IN R29, 0x3e READ FROM
RESERVED ADDRESS [0x5e]
R29=0x00 Y=0x00d9
3744000 anacomp 0x005c: main+0x5 LDI R24, 0xff R24=0xff
3760000 anacomp 0x005e: main+0x6 OUT 0x17, R24 Ddr=0xff
3776000 anacomp 0x0060: main+0x7 LDI R18, 0xff R18=0xff
3792000 anacomp 0x0062: main+0x8 LDI R24, 0x01 R24=0x01
3808000 anacomp 0x0064: main+0x9 LDI R25, 0x00 R25=0x00
3824000 anacomp 0x0066: main+0xa SBIS 0x08, 5
3840000 anacomp 0x0068: main+0xb RJMP 74
- [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/25
- [Simulavr-devel] anacomp getting reserved access messages, Schwichtenberg, Knut, 2009/03/27
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages,
Joel Sherrill <=
- RE: [Simulavr-devel] anacomp getting reserved access messages, Schwichtenberg, Knut, 2009/03/27
- RE: [Simulavr-devel] anacomp getting reserved access messages, Schwichtenberg, Knut, 2009/03/27
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joerg Wunsch, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joerg Wunsch, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joerg Wunsch, 2009/03/26
- Re: [Simulavr-devel] anacomp getting reserved access messages, Joel Sherrill, 2009/03/26