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Re: [Simulavr-devel] Trouble building master branch


From: address@hidden
Subject: Re: [Simulavr-devel] Trouble building master branch
Date: Fri, 16 Apr 2010 16:42:31 -0700

On Fri Apr 16 10:03 , ThomasK <address@hidden> sent:

>Hi Raphael,
>
>> Next step for me will be in a few days to try to have simulavr run two
>> ATmega32 communicating through an SPI link. From what I read in the PDF,
>> that should be possible, am I right ?
>
>It's possible, but only with a little bit work. You have to use TCL 
>interface or python interface for that. I've made this with python 
>interface as an example and test, how it could work. But this dosn't 
>work together with gdb. Mostly I don't use gdb, I prefer writing unit 
>tests for development.
>
>An other way is to do that with TCL interface. As I remember, Joel 
>Sherrill has used this for running multicore simulation. Maybe he can 
>answer your questions for TCL interface.

IIRC, the TCL and the python create the proper
Net objects before starting the simulation.
That can be done in C++.

---
Michael Hennebry
address@hidden
"War is only a hobby."
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