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Re: [Simulavr-devel] modification of AVR simulator for SCA


From: Albrecht Frenzel
Subject: Re: [Simulavr-devel] modification of AVR simulator for SCA
Date: Wed, 17 Feb 2016 17:01:27 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1

Chapter 7.5.1 "SPH and SPL – Stack Pointer High and Stack Pointer Low Register" of the atmega 48/88/168/328 says, that the initial value of SP is RAMEND.

simulavr terminates with assert(0 != SP_value), if SP==0, no matter, which instruction is executed. That means, that programmaticaly loading SP is impossible, if SP==0 at start of the simulator.

Testing for 0 != SP_value only makes sense on instructions, that use the content of SP.


-------------------

Regarding the assertion: assert(0 != SP_value)

Startup code in CRT (a C runtime) is expected initialize SPH:SPL to a
sane value - a value that points to RAM. Having SPH:SPL point to 0 (or
anywhere but RAM) indicates problem in simulated AVR code - not a
problem in simulavr iself.
That's not true.

Optiboot as delivered by the arduino IDE does not load SP, except the target is ATMEGA 8/16/32 and a comment states that SP gets loaded with RAMEND via reset.

A disassembly of the optiboot_atmega328.hex does not contain instructions to load SP but call instructions.

Simulavr terminates with assert(0 != SP_value) if I try to simulate that code - that means, that reset for 328p is incomplete.


On 12.02.2016 21:45, Petr Hluzín wrote:
On 10 February 2016 at 17:50, Klaus Rudolph <address@hidden> wrote:

The problem with the thread I can't explain. I never looked in that code and I 
have no idea what the tread is good for while accessing registers. Maybe this 
stuff can also be removed...

Maybe someone else can give some hints especially for this "mystery" threading 
things?

The ThreadList class watches writes to SPH and SPL and maintains a
simple state machine that allows it to distinguish:
(a) writes that grow or shrink a stack
(b) writes that initialize stack pointer in libc's startup code
(c) writes that switch stack to a different thread when the simulated
application uses an RTOS.

Simulavr then reports the detected call stacks as threads to GDB and
you can type "thread apply all backtrace" to see call-stacks of the
non-running threads.

Unfortunately GDB's code for unwinding stack is weaker than I
anticipated and the RTOSes I investigated do nonsensical stuff to SP
(in addition to switching threads) confusing the state machine, so the
feature is mostly useless right now. I guess you can rip it of from
the sources.


Regarding the assertion: assert(0 != SP_value)

Startup code in CRT (a C runtime) is expected initialize SPH:SPL to a
sane value - a value that points to RAM. Having SPH:SPL point to 0 (or
anywhere but RAM) indicates problem in simulated AVR code - not a
problem in simulavr iself. Therefore the line should not be an
assertion, it should print a message and pause simulation to allow
user to investigate using GDB. However, as you can see from the
backtrace, the situation is detected quite deep in simulavr and we
have no mechanism to report breakpoints from such depth.

(Also we do not have a mechanism to report multiple
breakpoints/problems triggering on the same instruction, imagine e.g.
an instruction execution accesses memory watched by gdb, a peripheral
detects something wrong at the same time and the next instruction has
an ordinary gdb breakpoint, etc. It is a nice capability to have,
would solve the problem of reporting a problem from the depth.)





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