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Re: [PATCH v1 2/2] target/microblaze: Improve transaction failure handli
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v1 2/2] target/microblaze: Improve transaction failure handling |
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Date: |
Fri, 28 Aug 2020 13:34:08 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 8/28/20 4:39 AM, Edgar E. Iglesias wrote:
> + if ((access_type == MMU_INST_FETCH && cpu->cfg.iopb_bus_exception) ||
> + (access_type != MMU_INST_FETCH && cpu->cfg.dopb_bus_exception)) {
> + cpu_restore_state(cs, retaddr, true);
> + env->sregs[SR_ESR] = access_type == MMU_INST_FETCH ?
> + ESR_EC_INSN_BUS : ESR_EC_DATA_BUS;
> + env->sregs[SR_EAR] = addr;
> + helper_raise_exception(env, EXCP_HW_EXCP);
I think it's better to use cpu_loop_exit_restore, adding the one line for
cs->exception_index from helper_raise_exception.
r~