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Re: [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_s
From: |
Peter Maydell |
Subject: |
Re: [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() |
Date: |
Tue, 12 Jan 2021 10:48:57 +0000 |
On Sun, 10 Jan 2021 at 08:15, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Usually the approach is that the device on the other end of the line
> is going to reset its state anyway, so there's no need to actively
> signal an irq line change during the reset hook.
>
> Move imx_spi_update_irq() out of imx_spi_reset(), to a new function
> imx_spi_hard_reset() that is called when the controller is disabled.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
>
> ---
>
> Changes in v4:
> - adujst the patch 2,3 order
> - rename imx_spi_soft_reset() to imx_spi_hard_reset() to avoid confusion
>
> Changes in v3:
> - new patch: remove imx_spi_update_irq() in imx_spi_reset()
>
> hw/ssi/imx_spi.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> index e605049a21..2c4c5ec1b8 100644
> --- a/hw/ssi/imx_spi.c
> +++ b/hw/ssi/imx_spi.c
> @@ -241,11 +241,16 @@ static void imx_spi_reset(DeviceState *dev)
> imx_spi_rxfifo_reset(s);
> imx_spi_txfifo_reset(s);
>
> - imx_spi_update_irq(s);
> -
> s->burst_length = 0;
> }
>
> +static void imx_spi_hard_reset(IMXSPIState *s)
> +{
> + imx_spi_reset(DEVICE(s));
> +
> + imx_spi_update_irq(s);
> +}
> +
> static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size)
> {
> uint32_t value = 0;
> @@ -351,8 +356,9 @@ static void imx_spi_write(void *opaque, hwaddr offset,
> uint64_t value,
> s->regs[ECSPI_CONREG] = value;
>
> if (!imx_spi_is_enabled(s)) {
> - /* device is disabled, so this is a reset */
> - imx_spi_reset(DEVICE(s));
> + /* device is disabled, so this is a hard reset */
> + imx_spi_hard_reset(s);
> +
> return;
> }
The function of the code is correct, but you seem to have the function
naming backwards here. Generally:
* soft reset == the reset triggered by the register write
* hard reset == power-on reset == the dc->reset function
I think this is what Philippe was trying to say.
thanks
-- PMM
- [PATCH v4 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Bin Meng, 2021/01/10
- [PATCH v4 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported, Bin Meng, 2021/01/10
- [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset(), Bin Meng, 2021/01/10
- [PATCH v4 3/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Bin Meng, 2021/01/10
- [PATCH v4 4/6] hw/ssi: imx_spi: Log unimplemented burst length, Bin Meng, 2021/01/10
- [PATCH v4 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic, Bin Meng, 2021/01/10
- [PATCH v4 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness, Bin Meng, 2021/01/10