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[Qemu-devel] [PATCH 06/10] target-arm: Move extended_addresses_enabled()
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 06/10] target-arm: Move extended_addresses_enabled() to internals.h |
Date: |
Fri, 29 Aug 2014 12:21:28 +0100 |
Move the utility function extended_addresses_enabled() into
internals.h; we're going to need to call it from op_helper.c.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 11 -----------
target-arm/internals.h | 11 +++++++++++
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 406b9bc..7963807 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -304,17 +304,6 @@ void init_cpreg_list(ARMCPU *cpu)
g_list_free(keys);
}
-/* Return true if extended addresses are enabled.
- * This is always the case if our translation regime is 64 bit,
- * but depends on TTBCR.EAE for 32 bit.
- */
-static inline bool extended_addresses_enabled(CPUARMState *env)
-{
- return arm_el_is_aa64(env, 1)
- || ((arm_feature(env, ARM_FEATURE_LPAE)
- && (env->cp15.c2_control & TTBCR_EAE)));
-}
-
static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t
value)
{
ARMCPU *cpu = arm_env_get_cpu(env);
diff --git a/target-arm/internals.h b/target-arm/internals.h
index 22f382c..1d788b0 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -142,6 +142,17 @@ static inline void update_spsel(CPUARMState *env, uint32_t
imm)
aarch64_restore_sp(env, cur_el);
}
+/* Return true if extended addresses are enabled.
+ * This is always the case if our translation regime is 64 bit,
+ * but depends on TTBCR.EAE for 32 bit.
+ */
+static inline bool extended_addresses_enabled(CPUARMState *env)
+{
+ return arm_el_is_aa64(env, 1)
+ || ((arm_feature(env, ARM_FEATURE_LPAE)
+ && (env->cp15.c2_control & TTBCR_EAE)));
+}
+
/* Valid Syndrome Register EC field values */
enum arm_exception_class {
EC_UNCATEGORIZED = 0x00,
--
1.9.1
- [Qemu-devel] [PATCH 00/10] Implement ARM architectural watchpoints, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 09/10] target-arm: Remove comment about MDSCR_EL1 being dummy implementation, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 10/10] target-arm: Implement minimal DBGVCR, OSDLR_EL1, MDCCSR_EL0, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 05/10] target-arm: Implement setting of watchpoints, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 03/10] exec.c: Record watchpoint fault address and direction, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 06/10] target-arm: Move extended_addresses_enabled() to internals.h,
Peter Maydell <=
- [Qemu-devel] [PATCH 08/10] target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 01/10] exec.c: Relax restrictions on watchpoint length and alignment, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 07/10] target-arm: Implement handling of fired watchpoints, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 02/10] exec.c: Provide full set of dummy wp remove functions in user-mode, Peter Maydell, 2014/08/29
- [Qemu-devel] [PATCH 04/10] cpu-exec: Make debug_excp_handler a QOM CPU method, Peter Maydell, 2014/08/29
- Re: [Qemu-devel] [PATCH 00/10] Implement ARM architectural watchpoints, Richard Henderson, 2014/08/29