Re: [Qemu-devel] [PATCH 5/5] tricore: reset DisasContext before generating code

[Bastian Koppelmann]

Hi Georg,

On 6/6/19 1:44 PM, Hofstetter, Georg (EFS-GH2) wrote:
> Hi Sebastian,
>
> in translate.c:gen_mtcr() code accesses hflags within the structure:
>      if ((ctx->hflags & TRICORE_HFLAG_KUU) == TRICORE_HFLAG_SM) {
>          /* since we're caching PSW make this a special case */
>
> The code expects the HFLAG set for kernel mode in (i guess) preparation for 
> supporting operation modes.
> There is no code modifying these flags.
> The flags were introduced in 0aaeb11 and there it looks like it was expected to 
> be zeroed - maybe you know a bit more.

Yep, the ctx->hflags is supposed to be synced by tb->flags (which is 
normally synced with CPUTriCoreState via cpu_get_tb_cpu_state()) in 
gen_intermediate_code(). Somehow I forgot to add the first sync. So, the 
proper fix is:

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 06c4485e55..44296b3fb1 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8804,6 +8804,7 @@ void gen_intermediate_code(CPUState *cs, 
TranslationBlock *tb, int max_insns)
     ctx.singlestep_enabled = cs->singlestep_enabled;
     ctx.bstate = BS_NONE;
     ctx.mem_idx = cpu_mmu_index(env, false);
+    ctx.hflags = (uint32_t)tb->flags;


     tcg_clear_temp_count();
     gen_tb_start(tb);


Cheers,

Bastian