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[PULL 38/48] target/arm: Enable ARMv8.1-VHE in -cpu max
From: |
Peter Maydell |
Subject: |
[PULL 38/48] target/arm: Enable ARMv8.1-VHE in -cpu max |
Date: |
Fri, 7 Feb 2020 14:33:33 +0000 |
From: Richard Henderson <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 2d97bf45e1e..c80fb5fd438 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -672,6 +672,7 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64mmfr1;
t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */
t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);
+ t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1);
cpu->isar.id_aa64mmfr1 = t;
/* Replicate the same data to the 32-bit id registers. */
--
2.20.1
- [PULL 27/48] target/arm: Update timer access for VHE, (continued)
- [PULL 27/48] target/arm: Update timer access for VHE, Peter Maydell, 2020/02/07
- [PULL 28/48] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Peter Maydell, 2020/02/07
- [PULL 31/48] target/arm: Flush tlb for ASID changes in EL2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 29/48] target/arm: Add VHE system register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 30/48] target/arm: Add VHE timer register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 32/48] target/arm: Flush tlbs for E2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 33/48] target/arm: Update arm_phys_excp_target_el for TGE, Peter Maydell, 2020/02/07
- [PULL 34/48] target/arm: Update {fp,sve}_exception_el for VHE, Peter Maydell, 2020/02/07
- [PULL 35/48] target/arm: check TGE and E2H flags for EL0 pauth traps, Peter Maydell, 2020/02/07
- [PULL 36/48] target/arm: Update get_a64_user_mem_index for VHE, Peter Maydell, 2020/02/07
- [PULL 38/48] target/arm: Enable ARMv8.1-VHE in -cpu max,
Peter Maydell <=
- [PULL 37/48] target/arm: Update arm_cpu_do_interrupt_aarch64 for VHE, Peter Maydell, 2020/02/07
- [PULL 40/48] target/arm: Pass more cpu state to arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 41/48] target/arm: Use bool for unmasked in arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 43/48] bcm2835_dma: Fix the ylen loop in TD mode, Peter Maydell, 2020/02/07
- [PULL 39/48] target/arm: Move arm_excp_unmasked to cpu.c, Peter Maydell, 2020/02/07
- [PULL 42/48] target/arm: Raise only one interrupt in arm_cpu_exec_interrupt, Peter Maydell, 2020/02/07
- [PULL 44/48] bcm2835_dma: Re-initialize xlen in TD mode, Peter Maydell, 2020/02/07
- [PULL 45/48] docs/arm-cpu-features: Make kvm-no-adjvtime comment clearer, Peter Maydell, 2020/02/07
- [PULL 46/48] armv7m_systick: delay timer_new to avoid memleaks, Peter Maydell, 2020/02/07
- [PULL 47/48] stm32f2xx_timer: delay timer_new to avoid memleaks, Peter Maydell, 2020/02/07