Re: [PATCH] !fixup "target/avr: Add defintions of AVR core types"

[Aleksandar Markovic]

On Friday, February 7, 2020, Philippe Mathieu-Daudé <address@hidden> wrote:
> These cores have unresolved review comment:
> https://www.mail-archive.com/address@hidden/msg674105.html
> https://www.mail-archive.com/address@hidden/msg674259.html
> and:
> https://www.mail-archive.com/address@hidden/msg676046.html
>
> As we don't want a bad start with this architecture, remove them.

I agree with underlying motivation of your fixup.

Still, the division of AVR cores into avr1, avr2, ... , xmega7 is here to stay. The reason is that because such coding is a part of ELF header, and this means they will stay forever (as they are approved by some kind of ELF comitee, and are meant not to be ever changed in future).

Rather than deleting definitions and references of core types we know we don't support (or, at least, don't fully support), let's think of some less intrusive way - for example, checking core type of executable given via CLI, and refusing to emulate, if we know we still have some issues with the core type in question.

For example, "avrtiny" type is missing handling the fact that it has 16 register instead of 32 registers, like otger AVR core types. But, other AVRFeatures of "avrtiny" are correctly identified, and it would be a shame to delete them now and force someone in future to reinvent the wheel. Just refusing to emulate "avrtiny" seems a better approach to me.

Aleksandar

 

> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> Based-on: <1581040680-308-1-git-send-email-aleksandar.markovic@rt-rk.com>
>
> Side note: typo in the subject "definitions"
> ---
>  target/avr/cpu.c | 96 ------------------------------------------------
>  1 file changed, 96 deletions(-)
>
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index 8a084c750f..b3d661142d 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -216,77 +216,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
>      cc->gdb_core_xml_file = "avr-cpu.xml";
>  }
>
> -/*
> - * Setting features of AVR core type avr1
> - * --------------------------------------
> - *
> - * This type of AVR core is present in the following AVR MCUs:
> - *
> - * at90s1200, attiny11, attiny12, attiny15, attiny28
> - */
> -static void avr_avr1_initfn(Object *obj)
> -{
> -    AVRCPU *cpu = AVR_CPU(obj);
> -    CPUAVRState *env = &cpu->env;
> -
> -    set_avr_feature(env, AVR_FEATURE_LPM);
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_SP);
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_PC);
> -}
> -
> -/*
> - * Setting features of AVR core type avr2
> - * --------------------------------------
> - *
> - * This type of AVR core is present in the following AVR MCUs:
> - *
> - * at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at90s4414,
> - * at90s4433, at90s4434, at90s8515, at90c8534, at90s8535
> - */
> -static void avr_avr2_initfn(Object *obj)
> -{
> -    AVRCPU *cpu = AVR_CPU(obj);
> -    CPUAVRState *env = &cpu->env;
> -
> -    set_avr_feature(env, AVR_FEATURE_LPM);
> -    set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
> -    set_avr_feature(env, AVR_FEATURE_ADIW_SBIW);
> -    set_avr_feature(env, AVR_FEATURE_SRAM);
> -    set_avr_feature(env, AVR_FEATURE_BREAK);
> -
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_PC);
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_SP);
> -}
> -
> -/*
> - * Setting features of AVR core type avr25
> - * --------------------------------------
> - *
> - * This type of AVR core is present in the following AVR MCUs:
> - *
> - * ata5272, ata6616c, attiny13, attiny13a, attiny2313, attiny2313a, attiny24,
> - * attiny24a, attiny4313, attiny44, attiny44a, attiny441, attiny84, attiny84a,
> - * attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461, attiny461a,
> - * attiny861, attiny861a, attiny43u, attiny87, attiny48, attiny88, attiny828,
> - * attiny841, at86rf401
> - */
> -static void avr_avr25_initfn(Object *obj)
> -{
> -    AVRCPU *cpu = AVR_CPU(obj);
> -    CPUAVRState *env = &cpu->env;
> -
> -    set_avr_feature(env, AVR_FEATURE_LPM);
> -    set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
> -    set_avr_feature(env, AVR_FEATURE_ADIW_SBIW);
> -    set_avr_feature(env, AVR_FEATURE_SRAM);
> -    set_avr_feature(env, AVR_FEATURE_BREAK);
> -
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_PC);
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_SP);
> -    set_avr_feature(env, AVR_FEATURE_LPMX);
> -    set_avr_feature(env, AVR_FEATURE_MOVW);
> -}
> -
>  /*
>   * Setting features of AVR core type avr3
>   * --------------------------------------
> @@ -499,27 +428,6 @@ static void avr_avr6_initfn(Object *obj)
>      set_avr_feature(env, AVR_FEATURE_MUL);
>  }
>
> -/*
> - * Setting features of AVR core type avrtiny
> - * --------------------------------------
> - *
> - * This type of AVR core is present in the following AVR MCUs:
> - *
> - * attiny4, attiny5, attiny9, attiny10, attiny20, attiny40
> - */
> -static void avr_avrtiny_initfn(Object *obj)
> -{
> -    AVRCPU *cpu = AVR_CPU(obj);
> -    CPUAVRState *env = &cpu->env;
> -
> -    set_avr_feature(env, AVR_FEATURE_LPM);
> -    set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
> -    set_avr_feature(env, AVR_FEATURE_BREAK);
> -
> -    set_avr_feature(env, AVR_FEATURE_2_BYTE_PC);
> -    set_avr_feature(env, AVR_FEATURE_1_BYTE_SP);
> -}
> -
>  /*
>   * Setting features of AVR core type xmega2
>   * --------------------------------------
> @@ -754,10 +662,6 @@ static const TypeInfo avr_cpu_type_info[] = {
>          .class_init = avr_cpu_class_init,
>          .abstract = true,
>      },
> -    DEFINE_AVR_CPU_TYPE("avrtiny", avr_avrtiny_initfn),
> -    DEFINE_AVR_CPU_TYPE("avr1", avr_avr1_initfn),
> -    DEFINE_AVR_CPU_TYPE("avr2", avr_avr2_initfn),
> -    DEFINE_AVR_CPU_TYPE("avr25", avr_avr25_initfn),
>      DEFINE_AVR_CPU_TYPE("avr3", avr_avr3_initfn),
>      DEFINE_AVR_CPU_TYPE("avr31", avr_avr31_initfn),
>      DEFINE_AVR_CPU_TYPE("avr35", avr_avr35_initfn),
> -- 
> 2.21.1