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[RFC PATCH v2 44/67] Hexagon TCG generation - step 06
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From: |
Taylor Simpson |
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Subject: |
[RFC PATCH v2 44/67] Hexagon TCG generation - step 06 |
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Date: |
Fri, 28 Feb 2020 10:43:40 -0600 |
Override memop instructions
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/helper_overrides.h | 60 +++++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index a6cbce0..00647cb 100644
--- a/target/hexagon/helper_overrides.h
+++ b/target/hexagon/helper_overrides.h
@@ -931,4 +931,64 @@
fWRAP_PRED_STORE(fEA_IMM(uiV), fLSBNEWNOT(PvN), \
fGETBYTE(0, hex_new_value[NtX]), 1, NOINC)
+/* We have to brute force memops because they have C math in the semantics */
+#define fWRAP_MEMOP(GENHLPR, SHORTCODE, SIZE, OP) \
+ do { \
+ TCGv tmp = tcg_temp_new(); \
+ fEA_RI(RsV, uiV); \
+ fLOAD(1, SIZE, s, EA, tmp); \
+ OP; \
+ fSTORE(1, SIZE, EA, tmp); \
+ tcg_temp_free(tmp); \
+ } while (0)
+
+#define fWRAP_L4_add_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_add_tl(tmp, tmp, RtV))
+#define fWRAP_L4_add_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_add_tl(tmp, tmp, RtV))
+#define fWRAP_L4_add_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_add_tl(tmp, tmp, RtV))
+#define fWRAP_L4_sub_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_sub_tl(tmp, tmp, RtV))
+#define fWRAP_L4_sub_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_sub_tl(tmp, tmp, RtV))
+#define fWRAP_L4_sub_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_sub_tl(tmp, tmp, RtV))
+#define fWRAP_L4_and_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_and_tl(tmp, tmp, RtV))
+#define fWRAP_L4_and_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_and_tl(tmp, tmp, RtV))
+#define fWRAP_L4_and_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_and_tl(tmp, tmp, RtV))
+#define fWRAP_L4_or_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_or_tl(tmp, tmp, RtV))
+#define fWRAP_L4_or_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_or_tl(tmp, tmp, RtV))
+#define fWRAP_L4_or_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_or_tl(tmp, tmp, RtV))
+#define fWRAP_L4_iadd_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_addi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_iadd_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_addi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_iadd_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_addi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_isub_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_subi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_isub_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_subi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_isub_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_subi_tl(tmp, tmp, UiV))
+#define fWRAP_L4_iand_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_andi_tl(tmp, tmp, ~(1 << UiV)))
+#define fWRAP_L4_iand_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_andi_tl(tmp, tmp, ~(1 << UiV)))
+#define fWRAP_L4_iand_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_andi_tl(tmp, tmp, ~(1 << UiV)))
+#define fWRAP_L4_ior_memopw_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 4, tcg_gen_ori_tl(tmp, tmp, 1 << UiV))
+#define fWRAP_L4_ior_memopb_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 1, tcg_gen_ori_tl(tmp, tmp, 1 << UiV))
+#define fWRAP_L4_ior_memoph_io(GENHLPR, SHORTCODE) \
+ fWRAP_MEMOP(GENHLPR, SHORTCODE, 2, tcg_gen_ori_tl(tmp, tmp, 1 << UiV))
+
#endif
--
2.7.4
- [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics, (continued)
- [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 19/67] Hexagon instruction class definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 13/67] Hexagon register map, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 02/67] Hexagon README, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 18/67] Hexagon arch import - instruction encoding, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 44/67] Hexagon TCG generation - step 06,
Taylor Simpson <=
- [RFC PATCH v2 31/67] Hexagon macros to interface with the generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 14/67] Hexagon instruction/packet decode, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 33/67] Hexagon instruction classes, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 41/67] Hexagon TCG generation - step 03, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 16/67] Hexagon arch import - instruction semantics definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 59/67] Hexagon HVX semantics generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 38/67] Hexagon TCG generation helpers - step 5, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h, Taylor Simpson, 2020/02/28