[PATCH qemu.git v3 0/8] hw/timer/imx_epit: improve and fix EPIT compare timer

[~axelheider]

This patch set improves the i.MX EPIT emulation:
- fix #1263 for writes to CR
- ensure SR_OCIF is set properly even if CR_OCIEN is off
- hardware reset initialized CR to 0
- interrupt state update on CR writes (e.g. software reset)
- remove explicit fields cnt and freq (they are redundant)
- general code and documentation improvements

v3 addresses the comments from the previous iterations, but still keeps
the scope of this patchset limited to addressing the obvious bugs in the
behavior. It does not try to improve the timer accuracy, thus the
following remarks remain to be fixed in a future patch after this one is
merged:
- don't use PTIMER_POLICY_LEGACY. Fine tuning this requires more
  time and currently this is not a major concern, because the timer is
  working reasonably well.
- replace the modestly harmful sequence
        counter = ptimer_get_count(s->timer_reload);
        ...
        ptimer_set_count(s->timer_cmp, counter);
  by something better that does not lose or gain time. The current
  patchset does not introduce this sequence, it has been there
  before already. Again,  the current lack of accuracy here is not a
  major concern because the timer is working reasonably well.

Axel Heider (8):
  hw/timer/imx_epit: improve comments
  hw/timer/imx_epit: cleanup CR defines
  hw/timer/imx_epit: define SR_OCIF
  hw/timer/imx_epit: update interrupt state on CR write access
  hw/timer/imx_epit: hard reset initializes CR with 0
  hw/timer/imx_epit: factor out register write handlers
  hw/timer/imx_epit: remove explicit fields cnt and freq
  hw/timer/imx_epit: fix compare timer handling

 hw/timer/imx_epit.c         | 370 +++++++++++++++++++++---------------
 include/hw/timer/imx_epit.h |   8 +-
 2 files changed, 222 insertions(+), 156 deletions(-)

-- 
2.34.5