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Re: [PATCH-for-8.0 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/


From: Bernhard Beschow
Subject: Re: [PATCH-for-8.0 7/7] hw/mips/gt64xxx_pci: Move it to hw/pci-host/
Date: Mon, 12 Dec 2022 00:02:42 +0000


Am 9. Dezember 2022 15:15:33 UTC schrieb "Philippe Mathieu-Daudé" 
<philmd@linaro.org>:
>From: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
>The GT-64120 is a north-bridge, and it is not MIPS specific.
>Move it with the other north-bridge devices.
>
>Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>---
> MAINTAINERS                                   | 2 +-
> hw/mips/Kconfig                               | 6 ------
> hw/mips/meson.build                           | 1 -
> hw/mips/trace-events                          | 6 ------
> hw/pci-host/Kconfig                           | 6 ++++++
> hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 0
> hw/pci-host/meson.build                       | 1 +
> hw/pci-host/trace-events                      | 7 +++++++
> meson.build                                   | 1 -
> 9 files changed, 15 insertions(+), 15 deletions(-)
> delete mode 100644 hw/mips/trace-events
> rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (100%)
>
>diff --git a/MAINTAINERS b/MAINTAINERS
>index 6966490c94..e558b53e85 100644
>--- a/MAINTAINERS
>+++ b/MAINTAINERS
>@@ -1226,7 +1226,7 @@ S: Odd Fixes
> F: hw/isa/piix4.c
> F: hw/acpi/piix4.c
> F: hw/mips/malta.c
>-F: hw/mips/gt64xxx_pci.c
>+F: hw/pci-host/gt64120.c
> F: include/hw/southbridge/piix.h
> F: tests/avocado/linux_ssh_mips_malta.py
> F: tests/avocado/machine_mips_malta.py
>diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
>index 8f7bce38fb..7a55143f8a 100644
>--- a/hw/mips/Kconfig
>+++ b/hw/mips/Kconfig
>@@ -60,9 +60,3 @@ config MIPS_BOSTON
> 
> config FW_CFG_MIPS
>     bool
>-
>-config GT64120
>-    bool
>-    select PCI
>-    select EMPTY_SLOT
>-    select I8259
>diff --git a/hw/mips/meson.build b/hw/mips/meson.build
>index 152103f15f..900613fc08 100644
>--- a/hw/mips/meson.build
>+++ b/hw/mips/meson.build
>@@ -3,7 +3,6 @@ mips_ss.add(files('bootloader.c', 'mips_int.c'))
> mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c'))
> mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 
> 'loongson3_virt.c'))
> mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c'))
>-softmmu_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c'))
> mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c'))
> 
> if 'CONFIG_TCG' in config_all
>diff --git a/hw/mips/trace-events b/hw/mips/trace-events
>deleted file mode 100644
>index 13ee731a48..0000000000
>--- a/hw/mips/trace-events
>+++ /dev/null
>@@ -1,6 +0,0 @@
>-# gt64xxx_pci.c
>-gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" 
>value:0x%08" PRIx64
>-gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" 
>value:0x%08" PRIx64
>-gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) 
>"gt64120 read %s size:%u value:0x%08" PRIx64
>-gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) 
>"gt64120 write %s size:%u value:0x%08" PRIx64
>-gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t 
>to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" 
>PRIx64 "@0x%08" PRIx64
>diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
>index 38fd2ee8f3..a07070eddf 100644
>--- a/hw/pci-host/Kconfig
>+++ b/hw/pci-host/Kconfig
>@@ -81,3 +81,9 @@ config MV64361
> config DINO
>     bool
>     select PCI
>+
>+config GT64120
>+    bool
>+    select PCI
>+    select EMPTY_SLOT
>+    select I8259

While at it: s/select I8259/depends on I8259/ since the model needs but doesn't 
provide I8259?

Best regards,
Bernhard

>diff --git a/hw/mips/gt64xxx_pci.c b/hw/pci-host/gt64120.c
>similarity index 100%
>rename from hw/mips/gt64xxx_pci.c
>rename to hw/pci-host/gt64120.c
>diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
>index e832babc9d..9a813d552e 100644
>--- a/hw/pci-host/meson.build
>+++ b/hw/pci-host/meson.build
>@@ -1,6 +1,7 @@
> pci_ss = ss.source_set()
> pci_ss.add(when: 'CONFIG_PAM', if_true: files('pam.c'))
> pci_ss.add(when: 'CONFIG_PCI_BONITO', if_true: files('bonito.c'))
>+pci_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64120.c'))
> pci_ss.add(when: 'CONFIG_PCI_EXPRESS_DESIGNWARE', if_true: 
> files('designware.c'))
> pci_ss.add(when: 'CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', if_true: 
> files('gpex.c'))
> pci_ss.add(when: ['CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', 'CONFIG_ACPI'], 
> if_true: files('gpex-acpi.c'))
>diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
>index 437e66ff50..9d216bb89f 100644
>--- a/hw/pci-host/trace-events
>+++ b/hw/pci-host/trace-events
>@@ -6,6 +6,13 @@ bonito_spciconf_small_access(uint64_t addr, unsigned size) 
>"PCI config address i
> # grackle.c
> grackle_set_irq(int irq_num, int level) "set_irq num %d level %d"
> 
>+# gt64120.c
>+gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" 
>value:0x%08" PRIx64
>+gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" 
>value:0x%08" PRIx64
>+gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) 
>"gt64120 read %s size:%u value:0x%08" PRIx64
>+gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) 
>"gt64120 write %s size:%u value:0x%08" PRIx64
>+gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t 
>to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" 
>PRIx64 "@0x%08" PRIx64
>+
> # mv64361.c
> mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t 
> moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
> mv64361_region_enable(const char *op, int num) "Should %s region %d"
>diff --git a/meson.build b/meson.build
>index 5c6b5a1c75..bd5774f32f 100644
>--- a/meson.build
>+++ b/meson.build
>@@ -2944,7 +2944,6 @@ if have_system
>     'hw/intc',
>     'hw/isa',
>     'hw/mem',
>-    'hw/mips',
>     'hw/misc',
>     'hw/misc/macio',
>     'hw/net',



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