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[PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags
From: |
CLEMENT MATHIEU--DRIF |
Subject: |
[PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags |
Date: |
Tue, 2 Jul 2024 05:52:34 +0000 |
From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
This will be necessary for devices implementing ATS.
We also define a new macro IOMMU_ACCESS_FLAG_FULL in addition to
IOMMU_ACCESS_FLAG to support more access flags.
IOMMU_ACCESS_FLAG is kept for convenience and backward compatibility.
Here are the flags added (defined by the PCIe 5 specification) :
- Execute Requested
- Privileged Mode Requested
- Global
- Untranslated Only
IOMMU_ACCESS_FLAG sets the additional flags to 0
Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
include/exec/memory.h | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 1be58f694c..aa8e114e77 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -110,15 +110,34 @@ struct MemoryRegionSection {
typedef struct IOMMUTLBEntry IOMMUTLBEntry;
-/* See address_space_translate: bit 0 is read, bit 1 is write. */
+/*
+ * See address_space_translate:
+ * - bit 0 : read
+ * - bit 1 : write
+ * - bit 2 : exec
+ * - bit 3 : priv
+ * - bit 4 : global
+ * - bit 5 : untranslated only
+ */
typedef enum {
IOMMU_NONE = 0,
IOMMU_RO = 1,
IOMMU_WO = 2,
IOMMU_RW = 3,
+ IOMMU_EXEC = 4,
+ IOMMU_PRIV = 8,
+ IOMMU_GLOBAL = 16,
+ IOMMU_UNTRANSLATED_ONLY = 32,
} IOMMUAccessFlags;
-#define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | ((w) ? IOMMU_WO : 0))
+#define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | \
+ ((w) ? IOMMU_WO : 0))
+#define IOMMU_ACCESS_FLAG_FULL(r, w, x, p, g, uo) \
+ (IOMMU_ACCESS_FLAG(r, w) | \
+ ((x) ? IOMMU_EXEC : 0) | \
+ ((p) ? IOMMU_PRIV : 0) | \
+ ((g) ? IOMMU_GLOBAL : 0) | \
+ ((uo) ? IOMMU_UNTRANSLATED_ONLY : 0))
struct IOMMUTLBEntry {
AddressSpace *target_as;
--
2.45.2
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, (continued)
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, CLEMENT MATHIEU--DRIF, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, cmd, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, Yi Liu, 2024/07/03
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, cmd, 2024/07/03
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, CLEMENT MATHIEU--DRIF, 2024/07/04
[PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 09/22] pci: cache the bus mastering status in the device, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags,
CLEMENT MATHIEU--DRIF <=
[PATCH ats_vtd v5 15/22] memory: Allow to store the PASID in IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 16/22] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 14/22] intel_iommu: implement the get_memory_region_pasid iommu operation, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 10/22] pci: add IOMMU operations to get address spaces and memory regions with PASID, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 12/22] pci: add a pci-level initialization function for iommu notifiers, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 11/22] memory: store user data pointer in the IOMMU notifiers, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 17/22] atc: generic ATC that can be used by PCIe devices that support SVM, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 02/22] intel_iommu: make types match, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 20/22] pci: add a pci-level API for ATS, CLEMENT MATHIEU--DRIF, 2024/07/02