[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pa
From: |
CLEMENT MATHIEU--DRIF |
Subject: |
[PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation |
Date: |
Tue, 2 Jul 2024 05:52:40 +0000 |
From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
hw/i386/intel_iommu.c | 13 ++++++++++---
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 2a78fc823f..e047d2ca83 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -5438,7 +5438,7 @@ static const MemoryRegionOps vtd_mem_ir_fault_ops = {
};
VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus,
- int devfn, unsigned int pasid)
+ int devfn, uint32_t pasid)
{
/*
* We can't simply use sid here since the bus number might not be
@@ -5995,19 +5995,26 @@ static void vtd_reset(DeviceState *dev)
vtd_refresh_pasid_bind(s);
}
-static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *vtd_host_dma_iommu_pasid(PCIBus *bus, void *opaque,
+ int devfn, uint32_t pasid)
{
IntelIOMMUState *s = opaque;
VTDAddressSpace *vtd_as;
assert(0 <= devfn && devfn < PCI_DEVFN_MAX);
- vtd_as = vtd_find_add_as(s, bus, devfn, PCI_NO_PASID);
+ vtd_as = vtd_find_add_as(s, bus, devfn, pasid);
return &vtd_as->as;
}
+static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+{
+ return vtd_host_dma_iommu_pasid(bus, opaque, devfn, PCI_NO_PASID);
+}
+
static PCIIOMMUOps vtd_iommu_ops = {
.get_address_space = vtd_host_dma_iommu,
+ .get_address_space_pasid = vtd_host_dma_iommu_pasid,
.set_iommu_device = vtd_dev_set_iommu_device,
.unset_iommu_device = vtd_dev_unset_iommu_device,
};
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index b32d711802..e334a3de6d 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -325,6 +325,6 @@ struct IntelIOMMUState {
* create a new one if none exists
*/
VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus,
- int devfn, unsigned int pasid);
+ int devfn, uint32_t pasid);
#endif
--
2.45.2
- Re: [PATCH ats_vtd v5 03/22] intel_iommu: return page walk level even when the translation fails, (continued)
[PATCH ats_vtd v5 08/22] intel_iommu: declare supported PASID size, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, CLEMENT MATHIEU--DRIF, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, Yi Liu, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, CLEMENT MATHIEU--DRIF, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, cmd, 2024/07/02
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, Yi Liu, 2024/07/03
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, cmd, 2024/07/03
- Re: [PATCH ats_vtd v5 04/22] intel_iommu: do not consider wait_desc as an invalid descriptor, CLEMENT MATHIEU--DRIF, 2024/07/04
[PATCH ats_vtd v5 13/22] intel_iommu: implement the get_address_space_pasid iommu operation,
CLEMENT MATHIEU--DRIF <=
[PATCH ats_vtd v5 06/22] pcie: add helper to declare PASID capability for a pcie device, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 09/22] pci: cache the bus mastering status in the device, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 05/22] memory: add permissions in IOMMUAccessFlags, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 15/22] memory: Allow to store the PASID in IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 16/22] intel_iommu: fill the PASID field when creating an instance of IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 14/22] intel_iommu: implement the get_memory_region_pasid iommu operation, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 10/22] pci: add IOMMU operations to get address spaces and memory regions with PASID, CLEMENT MATHIEU--DRIF, 2024/07/02
[PATCH ats_vtd v5 12/22] pci: add a pci-level initialization function for iommu notifiers, CLEMENT MATHIEU--DRIF, 2024/07/02