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[PATCH] intel-iommu: fix Read DMAR IQA REG DW
From: |
YeeLi |
Subject: |
[PATCH] intel-iommu: fix Read DMAR IQA REG DW |
Date: |
Thu, 4 Jul 2024 11:53:02 +0800 |
From: yeeli <seven.yi.lee@gmail.com>
When dmar_readq or devmem2 read the DW of IQA always 0UL because
"& VTD_IQA_QS". So, try to fix it.
case:
after vtd_mem_write
IQA val: 0x100206801
after vtd_mem_read
IQA val: 0x100206001
Signed-off-by: yeeli <seven.yi.lee@gmail.com>
---
hw/i386/intel_iommu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 37c21a0aec..e230a45940 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2938,7 +2938,8 @@ static uint64_t vtd_mem_read(void *opaque, hwaddr addr,
unsigned size)
/* Invalidation Queue Address Register, 64-bit */
case DMAR_IQA_REG:
- val = s->iq | (vtd_get_quad(s, DMAR_IQA_REG) & VTD_IQA_QS);
+ val = s->iq | (vtd_get_quad(s, DMAR_IQA_REG) & VTD_IQA_QS
+ | VTD_IQA_DW_MASK);
if (size == 4) {
val = val & ((1ULL << 32) - 1);
}
--
2.34.1
- [PATCH] intel-iommu: fix Read DMAR IQA REG DW,
YeeLi <=