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[PULL 36/96] ppc/pnv: Remove ppc target dependency from pnv_xscom.h
From: |
Nicholas Piggin |
Subject: |
[PULL 36/96] ppc/pnv: Remove ppc target dependency from pnv_xscom.h |
Date: |
Fri, 26 Jul 2024 09:53:09 +1000 |
From: Chalapathi V <chalapathi.v@linux.ibm.com>
In this commit target specific dependency from include/hw/ppc/pnv_xscom.h
has been removed so that pnv_xscom.h can be included outside hw/ppc.
Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Caleb Schlossin <calebs@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
include/hw/ppc/pnv_xscom.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index e93d310e79..764b324a00 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -21,9 +21,9 @@
#define PPC_PNV_XSCOM_H
#include "exec/memory.h"
-#include "hw/ppc/pnv.h"
typedef struct PnvXScomInterface PnvXScomInterface;
+typedef struct PnvChip PnvChip;
#define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface"
#define PNV_XSCOM_INTERFACE(obj) \
--
2.45.2
- [PULL 25/96] target/ppc: Add helpers to check for SMT sibling threads, (continued)
- [PULL 25/96] target/ppc: Add helpers to check for SMT sibling threads, Nicholas Piggin, 2024/07/25
- [PULL 23/96] ppc/pnv: Extend chip_pir class method to TIR as well, Nicholas Piggin, 2024/07/25
- [PULL 26/96] ppc: Add has_smt_siblings property to CPUPPCState, Nicholas Piggin, 2024/07/25
- [PULL 27/96] ppc/pnv: Add a big-core mode that joins two regular cores, Nicholas Piggin, 2024/07/25
- [PULL 28/96] ppc/pnv: Add allow for big-core differences in DT generation, Nicholas Piggin, 2024/07/25
- [PULL 29/96] ppc/pnv: Implement big-core PVR for Power9/10, Nicholas Piggin, 2024/07/25
- [PULL 30/96] ppc/pnv: Implement Power9 CPU core thread state indirect register, Nicholas Piggin, 2024/07/25
- [PULL 31/96] ppc/pnv: Add POWER10 ChipTOD quirk for big-core, Nicholas Piggin, 2024/07/25
- [PULL 32/96] ppc/pnv: Add big-core machine property, Nicholas Piggin, 2024/07/25
- [PULL 33/96] ppc/pnv: Add a CPU nmi and resume function, Nicholas Piggin, 2024/07/25
- [PULL 36/96] ppc/pnv: Remove ppc target dependency from pnv_xscom.h,
Nicholas Piggin <=
- [PULL 35/96] ppc/pnv: Add an LPAR per core machine option, Nicholas Piggin, 2024/07/25
- [PULL 34/96] ppc/pnv: Implement POWER10 PC xscom registers for direct controls, Nicholas Piggin, 2024/07/25
- [PULL 37/96] hw/ssi: Add SPI model, Nicholas Piggin, 2024/07/25
- [PULL 38/96] hw/ssi: Extend SPI model, Nicholas Piggin, 2024/07/25
- [PULL 39/96] hw/block: Add Microchip's 25CSM04 to m25p80, Nicholas Piggin, 2024/07/25