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Re: [PATCH v6 18/20] intel_iommu: Introduce a property x-flts for stage-


From: Jason Wang
Subject: Re: [PATCH v6 18/20] intel_iommu: Introduce a property x-flts for stage-1 translation
Date: Fri, 13 Dec 2024 11:41:56 +0800

On Thu, Dec 12, 2024 at 4:42 PM Zhenzhong Duan <zhenzhong.duan@intel.com> wrote:
>
> Intel VT-d 3.0 introduces scalable mode, and it has a bunch of capabilities
> related to scalable mode translation, thus there are multiple combinations.
>
> This vIOMMU implementation wants to simplify it with a new property "x-flts".
> When turned on in scalable mode, stage-1 translation is supported. When turned
> on in legacy mode, throw out error.
>
> With stage-1 translation support exposed to user, also accurate the pasid 
> entry
> check in vtd_pe_type_check().
>
> Suggested-by: Jason Wang <jasowang@redhat.com>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>

Acked-by: Jason Wang <jasowang@redhat.com>

Thanks




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