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From: | Jacques Mony |
Subject: | [Qemu-ppc] VSX registers definition question |
Date: | Mon, 19 Aug 2013 19:31:07 +0000 |
Hello, In target-ppc/cpu.h, there is the following definition: However, according to PowerISA 2.06B, there should be 64 of them, of 128 bits size. Moreover, they should be sharing content with FPR (32 first entries, 64 bits) and VSR (32 last entries). What would be the best way to realign the array and make it map the same registers as FPR and VSR ? Would resizing the array break backward compatibility of saved VMs? Thanks, Jacques Mony |
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