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Re: [Qemu-ppc] VSX registers definition question
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] VSX registers definition question |
Date: |
Wed, 28 Aug 2013 16:03:44 +0200 |
On 28.08.2013, at 15:59, Jacques Mony wrote:
> Hello,
>
> That's my understanding.
>
> However, I am wondering what the best approach is from the following 2 (or
> any other?):
>
> - Access GP registers array for lower 64 bits and vsr for higher 64
> bits, for the first 32 registers and then use the 32 VR registers for the
> second block of VSX registers (It makes sense but adds a layer of logic on
> all instructions (slighly less efficient?). But it would limit the impacts on
> the rest of the code, which of course is non-negligible.)
The largest register size we have in TCG is 64bit, so I don't think there'd be
such a big impact here really.
> - Modify the arrays to have a 64 range of 128 bits registers and modify
> all the existing addressing in existing opcodes (Honestly, don't like it)
Yeah, I'd rather not have to touch all the existing opcodes :).
Also, could you please reply in-line next time? It makes it a lot easier to
track what's going on :). Looking very much forward to VSX patches!
Alex