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Re: [Qemu-ppc] VSX registers definition question
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] VSX registers definition question |
Date: |
Wed, 28 Aug 2013 15:39:05 +0200 |
On 19.08.2013, at 21:31, Jacques Mony wrote:
> Hello,
>
> In target-ppc/cpu.h, there is the following definition:
>
> /* VSX registers */
> uint64_t vsr[32];
>
> However, according to PowerISA 2.06B, there should be 64 of them, of 128 bits
> size.
>
> Moreover, they should be sharing content with FPR (32 first entries, 64 bits)
> and VSR (32 last entries).
>
> What would be the best way to realign the array and make it map the same
> registers as FPR and VSR ? Would resizing the array break backward
> compatibility of saved VMs?
If I understand the spec correctly, the only thing VSX buys you in terms of
register space are the high 64bits to the FP registers. VRs are already 128
bits. So what this array defines are exactly those 32 fields that sit on top of
the FP registers, no?
Alex